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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Damphion,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/amphion,vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amphion VPU codec IP
11 - Ming Qian <ming.qian@nxp.com>
12 - Shijie Qin <shijie.qin@nxp.com>
14 description: |-
20 pattern: "^vpu@[0-9a-f]+$"
24 - enum:
[all …]
H A Drockchip-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1 VPU codecs implemented on Rockchip SoCs
11 - Ezequiel Garcia <ezequiel@collabora.com>
19 - enum:
20 - rockchip,rk3036-vpu
21 - rockchip,rk3066-vpu
22 - rockchip,rk3288-vpu
[all …]
H A Dnxp,imx8mq-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
11 - Philipp Zabel <p.zabel@pengutronix.de>
19 - const: nxp,imx8mq-vpu
21 - const: nxp,imx8mq-vpu-g1
22 - const: nxp,imx8mq-vpu-g2
23 - const: nxp,imx8mm-vpu-g1
[all …]
H A Dcoda.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chips&Media Coda multi-standard codec IP
10 - Philipp Zabel <p.zabel@pengutronix.de>
12 description: |-
14 called VPU (Video Processing Unit).
19 - items:
20 - const: fsl,imx27-vpu
21 - const: cnm,codadx6
[all …]
H A Dallwinner,sun50i-h6-vpu-g2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G2 VPU codec implemented on Allwinner H6 SoC
11 - Jernej Skrabec <jernej.skrabec@gmail.com>
18 const: allwinner,sun50i-h6-vpu-g2
28 - description: Bus Clock
29 - description: Module Clock
31 clock-names:
[all …]
H A Dmediatek,vcodec-encoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 - items:
21 - enum:
22 - mediatek,mt8173-vcodec-enc-vp8
23 - mediatek,mt8173-vcodec-enc
24 - mediatek,mt8183-vcodec-enc
[all …]
H A Dbrcm,bcm2835-unicam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/brcm,bcm2835-unicam.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
12 description: |-
14 CSI-2 or CCP2 data from image sensors or similar devices.
26 const: brcm,bcm2835-unicam
30 - description: Unicam block.
31 - description: Clock Manager Image (CMI) block.
[all …]
H A Dmediatek,vcodec-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-decode
[all...]
H A Dmicrochip,sama5d4-vdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1 VPU codec implemented on Microchip SAMA5D4 SoCs
11 - Emil Velikov <emil.velikov@collabora.com>
18 const: microchip,sama5d4-vdec
30 - compatible
31 - reg
32 - interrupts
[all …]
H A Drockchip,rk3568-vepu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1 VPU encoders implemented on Rockchip SoCs
11 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
14 Hantro G1 video encode-only accelerators present on Rockchip SoCs.
19 - rockchip,rk3568-vepu
20 - rockchip,rk3588-vepu121
31 clock-names:
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-vpu.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 vpu: vpu@2c000000 { label
8 #address-cells = <1>;
9 #size-cells = <1>;
12 power-domains = <&pd IMX_SC_R_VPU>;
16 compatible = "fsl,imx6sx-mu";
19 #mbox-cells = <2>;
20 power-domains = <&pd IMX_SC_R_VPU_MU_0>;
25 compatible = "fsl,imx6sx-mu";
28 #mbox-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dingenic,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ingenic,vpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from
11 Ingenic is a second Xburst MIPS CPU very similar to the main core.
16 - Paul Cercueil <paul@crapouillou.net>
20 const: ingenic,jz4770-vpu-rproc
24 - description: aux registers
25 - description: tcsm0 registers
[all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a510/
H A Dpipeline.json33 "PublicDescription": "No operation issued due to the frontend, pre-decode error",
36 "BriefDescription": "No operation issued due to the frontend, pre-decode error"
51 …he Vector Processing Unit (VPU). This event counts every cycle where there is a stall or an interl…
54 …he Vector Processing Unit (VPU). This event counts every cycle where there is a stall or an interl…
69 …e event counts for stalls that are caused by missing the cache or where the data is Non-cacheable",
72 …he event counts for stalls that are caused by missing the cache or where the data is Non-cacheable"
93 …due to the backend, VPU hazard. This event counts every cycle where the core stalls due to content…
96 …due to the backend, VPU hazard. This event counts every cycle where the core stalls due to content…
/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx8mq-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MQ VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the VPU peripherals
15 located in the VPU domain of the SoC.
20 - const: fsl,imx8mq-vpu-blk-ctrl
[all …]
H A Dfsl,imx8mm-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the VPU peripherals
15 located in the VPU domain of the SoC.
20 - const: fsl,imx8mm-vpu-blk-ctrl
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
[all …]
H A Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 - $ref: /schemas/sound/dai-common.yaml#
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
36 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxbb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
[all …]
H A Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
[all …]
H A Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
13 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dnxp,imx95-blk-ctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
15 - enum:
16 - nxp,imx95-lvds-csr
17 - nxp,imx95-display-csr
18 - nxp,imx95-camera-csr
19 - nxp,imx95-netcmix-blk-ctrl
[all …]
/freebsd/sys/contrib/device-tree/Bindings/power/
H A Damlogic,meson-ee-pwrc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic Meson Everything-Else Power Domains
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The Everything-Else Power Domains node should be the child of a syscon
17 - compatible: Should be the following:
18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
26 - amlogic,meson8-pwrc
[all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dimx8mq-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
35 /* VPU PLL */
133 /* VPU */
137 /* GPU CORE */
153 /* VPU BUS */
/freebsd/sys/contrib/device-tree/Bindings/soc/bcm/
H A Dbrcm,bcm2835-vchiq.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2835-vchiq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
14 to communicate with the VPU-side OS services.
19 - description: BCM2835 based boards
21 - enum:
22 - brcm,bcm2835-vchiq
24 - description: BCM2836/BCM2837 based boards
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
30 "^LDO[1-6]$":
37 regulator-name:
38 pattern: "^ldo[1-6]$"
[all …]

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