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/freebsd/sys/contrib/device-tree/Bindings/media/xilinx/
H A Dvideo.txt1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
6 creating a video pipeline.
8 Each video IP core is represented by an AMBA bus child node in the device
10 cores are represented as defined in ../video-interfaces.txt.
13 tree using bindings documented in ./xlnx,video.txt.
18 The following properties are common to all Xilinx video IP cores.
20 - xlnx,video-format: This property represents a video format transmitted on an
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
22 Video IP and System Design Guide" [UG934]. How the format relates to the IP
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H A Dxlnx,v-tpg.txt1 Xilinx Video Test Pattern Generator (TPG)
16 - clocks: Reference to the video core clock.
18 - xlnx,video-format, xlnx,video-width: Video format and width, as defined in
19 video.txt.
21 - port: Video port, using the DT bindings defined in ../video-interfaces.txt.
26 - xlnx,vtc: A phandle referencing the Video Timing Controller that generates
27 video timings for the TPG test patterns.
31 video timings.
53 xlnx,video-format = <XVIP_VF_YUV_422>;
54 xlnx,video-width = <8>;
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H A Dxlnx,video.txt1 Xilinx Video IP Pipeline (VIPP)
7 Xilinx video IP pipeline processes video streams through one or more Xilinx
8 video IP cores. Each video IP core is represented as documented in video.txt
11 mappings between DMAs and the video IP cores.
15 - compatible: Must be "xlnx,video".
22 - ports: Video port, using the DT bindings defined in ../video-interfaces.txt.
32 compatible = "xlnx,video";
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dsamsung,mipi-video-phy.yaml4 $id: http://devicetree.org/schemas/phy/samsung,mipi-video-phy.yaml#
15 For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the
22 samsung,exynos5420-mipi-video-phy and samsung,exynos5433-mipi-video-phy
29 - samsung,s5pv210-mipi-video-phy
30 - samsung,exynos5420-mipi-video-phy
31 - samsung,exynos5433-mipi-video-phy
41 samsung,s5pv210-mipi-video-phy and samsung,exynos5420-mipi-video-phy (if
49 samsung,exynos5433-mipi-video-phy (if not a child of PMU).
55 samsung,exynos5433-mipi-video-phy.
61 samsung,exynos5433-mipi-video-phy.
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/freebsd/stand/efi/include/
H A Defiuga.h29 Return the current video mode information.
32 @param HorizontalResolution Current video horizontal resolution in pixels
33 @param VerticalResolution Current video vertical resolution in pixels
34 @param ColorDepth Current video color depth in bits per pixel
35 @param RefreshRate Current video refresh rate in Hz.
38 @retval EFI_NOT_STARTED Video display is not initialized. Call SetMode ()
54 Return the current video mode information.
57 @param HorizontalResolution Current video horizontal resolution in pixels
58 @param VerticalResolution Current video vertical resolution in pixels
59 @param ColorDepth Current video color depth in bits per pixel
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dallwinner,sun4i-a10-video-engine.yaml4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml#
7 title: Allwinner A10 Video Engine
16 - allwinner,sun4i-a10-video-engine
17 - allwinner,sun5i-a13-video-engine
18 - allwinner,sun7i-a20-video-engine
19 - allwinner,sun8i-a33-video-engine
20 - allwinner,sun8i-h3-video-engine
21 - allwinner,sun8i-v3s-video-engine
22 - allwinner,sun8i-r40-video-engine
23 - allwinner,sun20i-d1-video-engine
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H A Dqcom,sc7280-venus.yaml7 title: Qualcomm SC7280 Venus video encode and decode accelerators
13 The Venus Iris2 IP is a video encode and decode accelerator present
55 - const: video-mem
61 video-decoder:
73 video-encoder:
89 - video-decoder
90 - video-encoder
101 venus: video-codec@aa00000 {
121 interconnect-names = "cpu-cfg", "video-mem";
128 video-decoder {
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H A Dqcom,sm8250-venus.yaml7 title: Qualcomm SM8250 Venus video encode and decode accelerators
13 The Venus IP is a video encode and decode accelerator present
52 - const: video-mem
66 video-decoder:
78 video-encoder:
98 - video-decoder
99 - video-encoder
111 venus: video-codec@aa00000 {
127 interconnect-names = "cpu-cfg", "video-mem";
136 video
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H A Dqcom,sc7180-venus.yaml7 title: Qualcomm SC7180 Venus video encode and decode accelerators
13 The Venus IP is a video encode and decode accelerator present
56 - const: video-mem
63 video-decoder:
75 video-encoder:
91 - video-decoder
92 - video-encoder
101 venus: video-codec@aa00000 {
118 video-decoder {
122 video-encoder {
H A Dqcom,sdm660-venus.yaml7 title: Qualcomm SDM660 Venus video encode and decode accelerators
14 The Venus IP is a video encode and decode accelerator present
40 - const: video-mem
48 video-decoder:
73 video-encoder:
101 - video-decoder
102 - video-encoder
111 video-codec@cc00000 {
121 interconnect-names = "cpu-cfg", "video-mem";
146 video-decoder {
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H A Dqcom,msm8916-venus.yaml7 title: Qualcomm MSM8916 Venus video encode and decode accelerators
13 The Venus IP is a video encode and decode accelerator present
38 video-decoder:
50 video-encoder:
65 - video-decoder
66 - video-encoder
75 video-codec@1d00000 {
87 video-decoder {
91 video-encoder {
H A Daspeed-video.txt1 * Device tree bindings for Aspeed Video Engine
3 The Video Engine (VE) embedded in the Aspeed AST2400/2500/2600 SOCs can
4 capture and compress video data from digital or analog sources.
7 - compatible: "aspeed,ast2400-video-engine" or
8 "aspeed,ast2500-video-engine" or
9 "aspeed,ast2600-video-engine"
25 video-engine@1e700000 {
26 compatible = "aspeed,ast2500-video-engine";
H A Dqcom,msm8996-venus.yaml7 title: Qualcomm MSM8996 Venus video encode and decode accelerators
13 The Venus IP is a video encode and decode accelerator present
43 - const: video-mem
49 video-decoder:
74 video-encoder:
102 - video-decoder
103 - video-encoder
112 video-codec@c00000 {
144 video-decoder {
151 video-encoder {
H A Dqcom,sdm845-venus-v2.yaml7 title: Qualcomm SDM845 Venus v2 video encode and decode accelerators
13 The Venus IP is a video encode and decode accelerator present
56 - const: video-mem
63 video-core0:
75 video-core1:
91 - video-core0
92 - video-core1
101 video-codec@aa00000 {
123 video-core0 {
127 video
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H A Dqcom,sdm845-venus.yaml7 title: Qualcomm SDM845 Venus video encode and decode accelerators
13 The Venus IP is a video encode and decode accelerator present
38 video-core0:
64 video-core1:
93 - video-core0
94 - video-core1
103 video-codec@aa00000 {
116 video-core0 {
124 video-core1 {
H A Drockchip,vdec.yaml7 title: Rockchip Video Decoder (VDec)
13 The Rockchip rk3399 has a stateless Video Decoder that can decodes H.264,
34 - description: The Video Decoder AXI interface clock
35 - description: The Video Decoder AHB interface clock
36 - description: The Video Decoded CABAC clock
37 - description: The Video Decoder core clock
72 vdec: video-codec@ff660000 {
/freebsd/contrib/file/magic/Magdir/
H A Danimation12 !:mime video/x-sgi-movie
14 !:mime video/quicktime
20 !:mime video/quicktime
22 !:mime video/quicktime
24 #!:mime video/quicktime
26 #!:mime video/quicktime
40 !:mime video/mp4
43 >>140 string x \b, Video "%.4s"
47 !:mime video/3gpp2
57 !:mime video/3gpp
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/freebsd/usr.sbin/vidcontrol/
H A Dvidcontrol.14 .\" vidcontrol - a utility for manipulating the syscons or vt video driver
20 .Nd system video console control and configuration utility
56 such as video mode, colors, cursor shape, screen output map, font, and screen
66 Select a new video mode.
107 .Sx Video Mode Support
125 This option may not be always supported by the video driver.
143 that should be at worst inverse video.
232 depending on the video mode and renderer.
324 Note that older video cards, such as MDA and CGA, do not support
327 .Sx Video Mod
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/freebsd/sys/contrib/device-tree/Bindings/display/ti/
H A Dti,j721e-dss.yaml16 four video planes. There is two full video planes and two "lite
17 planes" without scaling support. The video ports can be connected to
30 - description: VIDL1 light video plane 1
31 - description: VIDL2 light video plane 2
32 - description: VID1 video plane 1
33 - description: VID1 video plane 2
38 - description: VP1 video port 1
39 - description: VP2 video port 2
40 - description: VP3 video port 3
41 - description: VP4 video port 4
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H A Dti,am65x-dss.yaml16 ports and two video planes. In AM65x DSS, the first video port
17 supports 1 OLDI TX and in AM625 DSS, the first video port output is
18 internally routed to 2 OLDI TXes. The second video port supports DPI
19 format. The first plane is full video plane with all features and the
34 - description: VIDL1 light video plane
35 - description: VID video plane
38 - description: VP1 video port 1
39 - description: VP2 video port 2
56 - description: vp1 Video Port 1 pixel clock
57 - description: vp2 Video Port 2 pixel clock
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/freebsd/sys/contrib/device-tree/Bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml16 | DPDMA | --->| | --> | Video | Video +-------------+ |
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
21 Live Video --->| | --> | Audio | Audio | |---> | PHY1 |
27 Blended Video and
31 live audio/video streams from the programmable logic. The Video Rendering
32 Pipeline blends the video and graphics layers and performs colorspace
37 The subsystem supports 2 video and 2 audio streams, and various pixel formats
65 The APB clock and at least one video clock are mandatory, the audio clock
72 dp_vtc_pixel_clk_in is the non-live video clock (from Processing
75 dp_live_video_in_clk is the live video clock (from Programmable
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,ethdr.yaml15 designed for HDR video and graphics conversion in the external display path.
19 This engine is composed of two video frontends, two graphic frontends,
20 one video backend and a mixer. ETHDR has two DMA function blocks, DS and ADL.
55 - description: video frontend 0 clock
56 - description: video frontend 1 clock
59 - description: video backend clock
61 - description: video frontend 0 async clock
62 - description: video frontend 1 async clock
65 - description: video backend async clock
89 - description: video fronten
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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Damlogic,meson-vpu.yaml17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
29 VIU: Video Input Unit
32 The Video Input Unit is in charge of the pixel scanout from the DDR memory.
35 It can handle 2 OSD Planes and 2 Video Planes.
37 VPP: Video Post Processing
40 The Video Post Processing is in charge of the scaling and blending of the
42 There is a special "pre-blending" used by the video planes with a dedicated
46 VENC: Video Encoders
50 - ENCI : Interlace Video encoder for CVBS and Interlace HDMI
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/freebsd/share/man/man4/
H A Dvga.432 .Nd generic video card interface
49 driver is a generic video card driver which provides access to
50 video cards.
55 driver to manipulate video hardware (changing video modes, loading font, etc).
59 driver supports the standard video cards: MDA, CGA, EGA and VGA.
61 addition, the driver can utilize VESA BIOS extensions if the video card
94 These modes are not always supported by the video card and the display.
127 This option prevents the driver from changing video modes.
167 .%A Video Electronics Standards Association
/freebsd/sys/dev/acpica/
H A Dacpi_video.c51 /* ACPI video extension driver. */
200 * The 'video' lock protects the hierarchy of video output devices
201 * (the video "bus"). The 'video_output' lock protects per-output
202 * data is equivalent to a softc lock for each video output.
204 ACPI_SERIAL_DECL(video, "ACPI video");
205 ACPI_SERIAL_DECL(video_output, "ACPI video output");
206 static MALLOC_DEFINE(M_ACPIVIDEO, "acpivideo", "ACPI video extension");
288 if (acpi_disabled("video") || in acpi_video_probe()
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