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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sdm660-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM660 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
14 The Venus IP is a video encode and decode accelerator present
18 - $ref: qcom,venus-common.yaml#
22 const: qcom,sdm660-venus
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H A Dqcom,sc7280-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus Iris2 IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sc7280-venus
23 power-domains:
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H A Dqcom,sm8250-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8250 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sm8250-venus
23 power-domains:
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H A Dnvidia,tegra-vde.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Video Decoder Engine
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
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H A Dqcom,sm8550-iris.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8550-iris.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm iris video encode and decode accelerators
10 - Vikash Garodia <quic_vgarodia@quicinc.com>
11 - Dikshita Agarwal <quic_dikshita@quicinc.com>
14 The iris video processing unit is a video encode and decode accelerator
20 - items:
21 - enum:
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H A Dqcom,sc7180-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7180 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
22 - items:
23 - enum:
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H A Dqcom,msm8996-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8996 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
22 - qcom,msm8996-venus
23 - qcom,msm8998-venus
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H A Dqcom,sdm845-venus-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM845 Venus v2 video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sdm845-venus-v2
23 power-domains:
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H A Dallwinner,sun8i-h3-deinterlace.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jernej Skrabec <jernej.skrabec@siol.net>
11 - Chen-Yu Tsai <wens@csie.org>
12 - Maxime Ripard <mripard@kernel.org>
14 description: |-
16 deinterlacing interlaced video content.
21 - const: allwinner,sun8i-h3-deinterlace
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H A Dqcom,sdm660-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
11 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
18 const: qcom,sdm660-camss
24 clock-names:
26 - const: ahb
27 - const: cphy_csid0
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H A Dallwinner,sun4i-a10-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
13 description: |-
20 - const: allwinner,sun4i-a10-csi1
21 - const: allwinner,sun7i-a20-csi0
22 - items:
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/freebsd/sys/contrib/device-tree/Bindings/gpu/host1x/
H A Dnvidia,tegra210-nvenc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVENC is the hardware video encoder present on NVIDIA Tegra210
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
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H A Dnvidia,tegra210-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVDEC is the hardware video decoder present on NVIDIA Tegra210
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra210-nvdec
25 - nvidia,tegra186-nvdec
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H A Dnvidia,tegra234-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVDEC is the hardware video decoder present on NVIDIA Tegra210
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra234-nvdec
32 clock-names:
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/freebsd/sys/contrib/device-tree/Bindings/sram/
H A Dqcom,ocmem.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bria
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Darm,syscon-icst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
25 connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to
26 different values and sometimes also hard-wires the output divider. They
32 generating e.g. video clocks. It is located on the core module and there is
38 integratorap-cm
41 integratorap-sys
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/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra124-vic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-vic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Video Image Composer
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^vic@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra124-vic
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H A Dnvidia,tegra186-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display@[0-9a-f]+$"
19 - nvidia,tegra186-dc
20 - nvidia,tegra194-dc
30 - description: display controller pixel clock
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/freebsd/sys/dev/fb/
H A Dfb.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
55 * We need at least one entry each in order to initialize a video card
111 * Low-level frame buffer driver functions
121 adp->va_flags = 0; in vid_init_struct()
122 adp->va_name = name; in vid_init_struct()
123 adp->va_type = type; in vid_init_struct()
124 adp->va_unit = unit; in vid_init_struct()
127 /* Register a video adapter */
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddpu.txt6 sub-blocks like DPU display controller, DSI and DP interfaces etc.
11 - compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss"
12 - reg: physical base address and length of controller's registers.
13 - reg-names: register region names. The following region is required:
15 - power-domains: a power domain consumer specifier according to
17 - clocks: list of clock specifiers for clocks needed by the device.
18 - clock-names: device clock names, must be in same order as clocks property.
23 - interrupts: interrupt signal from MDSS.
24 - interrupt-controller: identifies the node as an interrupt controller.
25 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
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/freebsd/sys/compat/linuxkpi/common/src/
H A Dlinux_aperture.c1 // SPDX-License-Identifier: MIT
14 #include <video/vga.h>
21 * graphics drivers, such as EFI-GOP or VESA, early during the boot process.
23 * hardware-specific driver. To take over the device, the dedicated driver
25 * ownership of framebuffer memory and hand-over between drivers.
32 * .. code-block:: c
36 * struct resource *mem;
40 * mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
41 * if (!mem)
42 * return -ENODEV;
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/allwinner/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 #cooling-cells = <2>;
23 compatible = "arm,cortex-a53";
26 enable-method = "psci";
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/freebsd/sys/x86/xen/
H A Dhvm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 #include <xen/xen-os.h>
63 #include <contrib/xen/arch-x86/cpuid.h>
67 /*--------------------------- Forward Declarations ---------------------------*/
70 /*-------------------------------- Global Data -------------------------------*/
81 * If non-zero, the hypervisor has been configured to use a direct
92 /*------------------------------- Per-CPU Data -------------------------------*/
95 /*------------------------------ Sysctl tunables -----------------------------*/
101 /*---------------------- XEN Hypervisor Probe and Setup ----------------------*/
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/freebsd/sys/conf/
H A Dfiles.arm16 arm/arm/cpu_asm-v6.S standard
33 arm/arm/identcpu-v6.c standard
37 arm/arm/locore.S standard no-obj
38 arm/arm/hypervisor-stub.S standard
44 arm/arm/mem.c optional mem
55 arm/arm/pmap-v6.c standard
65 compile-with "${NORMAL_C:N-Wmissing-prototypes}"
68 arm/arm/swtch-v6.S standard
71 arm/arm/trap-v6.c standard
77 cddl/dev/dtrace/arm/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}"
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-h3-h5.dtsi"
44 #include <dt-bindings/thermal/thermal.h>
47 cpu0_opp_table: opp-table-cpu {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
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