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/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dtvp514x.txt1 * Texas Instruments TVP514x video decoder
3 The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip
4 digital video decoder that digitizes and decodes all popular baseband analog
5 video formats into digital video component. The tvp514x decoder supports analog-
6 to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D
7 conversion and decoding of NTSC, PAL and SECAM composite and S-video into
11 - compatible : value should be either one among the following
12 (a) "ti,tvp5146" for tvp5146 decoder.
13 (b) "ti,tvp5146m2" for tvp5146m2 decoder.
14 (c) "ti,tvp5147" for tvp5147 decoder.
[all …]
H A Dtechwell,tw9900.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Techwell TW9900 NTSC/PAL video decoder
10 - Mehdi Djait <mehdi.djait@bootlin.com>
13 The tw9900 is a multi-standard video decoder, supporting NTSC, PAL standards
14 with auto-detection features.
23 vdd-supply:
26 reset-gpios:
30 powerdown-gpios:
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H A Dadv7180.txt1 * Analog Devices ADV7180 analog video decoder family
3 The adv7180 family devices are used to capture analog video to different
4 digital interfaces like MIPI CSI-2 or parallel video.
7 - compatible : value must be one of
13 "adi,adv7280-m"
15 "adi,adv7281-m"
16 "adi,adv7281-ma"
18 "adi,adv7282-m"
22 video interface bindings defined in
23 Documentation/devicetree/bindings/media/video-interfaces.txt. The port
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H A Dtvp7002.txt1 * Texas Instruments TV7002 video decoder
3 The TVP7002 device supports digitizing of video and graphics signal in RGB and
7 - compatible : Must be "ti,tvp7002"
10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
16 - pclk-sample: Clock polarity of the bus. Default value when this property is
19 - sync-on-green-active: Active state of Sync-on-green signal property of the
24 - field-even-active: Active-high Field ID output polarity control of the bus.
31 video-interfaces.txt.
44 hsync-active = <1>;
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H A Dadv748x.txt1 * Analog Devices ADV748X video decoder with HDMI receiver
3 The ADV7481 and ADV7482 are multi format video decoders with an integrated
4 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB
9 - compatible: Must contain one of the following
10 - "adi,adv7481" for the ADV7481
11 - "adi,adv7482" for the ADV7482
13 - reg: I2C slave addresses
14 The ADV748x has up to twelve 256-byte maps that can be accessed via the
21 - interrupt-names: Should specify the interrupts as "intrq1", "intrq2" and/or
24 - interrupts: Specify the interrupt lines for the ADV748x
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,msm8916-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dqcom,sc7180-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7180 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sc7180-venus
23 power-domains:
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H A Dqcom,sc7280-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus Iris2 IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sc7280-venus
23 power-domains:
[all …]
H A Dqcom,sm8250-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dqcom,sdm660-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM660 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
14 The Venus IP is a video encode and decode accelerator present
18 - $ref: qcom,venus-common.yaml#
22 const: qcom,sdm660-venus
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H A Drockchip,vdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Video Decoder (VDec)
10 - Heiko Stuebner <heiko@sntech.de>
12 description: |-
13 The Rockchip rk3399 has a stateless Video Decoder that can decodes H.264,
19 - const: rockchip,rk3399-vdec
20 - items:
21 - enum:
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H A Dqcom,msm8996-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8996 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
22 - qcom,msm8996-venus
23 - qcom,msm8998-venus
[all …]
H A Dst,stm32mp25-video-codec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32mp25-video-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32MP25 VDEC video decoder & VENC video encoder
10 - Hugues Fruchet <hugues.fruchet@foss.st.com>
13 The STMicroelectronics STM32MP25 SOCs embeds a VDEC video hardware
14 decoder peripheral based on Verisilicon VC8000NanoD IP (former Hantro G1)
15 and a VENC video hardware encoder peripheral based on Verisilicon
21 - st,stm32mp25-vdec
[all …]
H A Dqcom,sdm845-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM845 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sdm845-venus
23 power-domains:
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H A Dqcom,sdm845-venus-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v
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H A Dmediatek-vcodec.txt1 Mediatek Video Codec
3 Mediatek Video Codec is the video codec hw present in Mediatek SoCs which
7 - compatible : must be one of the following string:
8 "mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder.
9 "mediatek,mt8173-vcodec-enc" for mt8173 avc encoder.
10 "mediatek,mt8183-vcodec-enc" for MT8183 encoder.
11 "mediatek,mt8173-vcodec-dec" for MT8173 decoder.
12 "mediatek,mt8192-vcodec-enc" for MT8192 encoder.
13 "mediatek,mt8183-vcodec-dec" for MT8183 decoder.
14 "mediatek,mt8195-vcodec-enc" for MT8195 encoder.
[all …]
H A Dallegro.txt1 Device-tree bindings for the Allegro DVT video IP codecs present in the Xilinx
3 decoder ip core.
10 - compatible: value should be one of the following
11 "allegro,al5e-1.1", "allegro,al5e": encoder IP core
12 "allegro,al5d-1.1", "allegro,al5d": decoder IP core
13 - reg: base and length of the memory mapped register region and base and
15 - reg-names: must include "regs" and "sram"
16 - interrupts: shared interrupt from the MCUs to the processing system
17 - clocks: must contain an entry for each entry in clock-names
18 - clock-names: must include "core_clk", "mcu_clk", "m_axi_core_aclk",
[all …]
H A Damlogic,gx-vdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/amlogic,gx-vdec.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic Video Decoder
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Maxime Jourdan <mjourdan@baylibre.com>
15 The video decoding IP lies within the DOS memory region,
20 - ESPARSER is a bitstream parser that outputs to a VIFIFO. Further VDEC blocks
22 - VDEC_1 can decode MPEG-1, MPEG-2, MPEG-4 part 2, MJPEG, H.263, H.264, VC-1.
[all …]
H A Dnvidia,tegra-vde.txt1 NVIDIA Tegra Video Decoder Engine
4 - compatible : Must contain one of the following values:
5 - "nvidia,tegra20-vde"
6 - "nvidia,tegra30-vde"
7 - "nvidia,tegra114-vde"
8 - "nvidia,tegra124-vde"
9 - "nvidia,tegra132-vde"
10 - reg : Must contain an entry for each entry in reg-names.
11 - reg-names : Must include the following entries:
12 - sxe
[all …]
H A Dmediatek,vcodec-subdev-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subde
[all...]
H A Dnvidia,tegra-vde.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Video Decoder Engine
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
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/freebsd/share/man/man4/
H A Dsplash.43 .\" Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
62 matching splash image decoder module must be loaded by the boot loader.
63 Currently the following decoder modules are available:
65 .Bl -tag -width splash_decoder -compact
67 Windows BMP file decoder.
69 decoder currently only handles 256 color bitmaps.
72 ZSoft PCX decoder.
73 This decoder currently only supports version 5 8-bpp single-plane
76 TheDraw binary ASCII drawing file decoder.
77 Displays a text-mode 80x25 ASCII drawing, such as that produced by
[all …]
/freebsd/sys/dev/fb/
H A Dsplash.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
46 /* video adapter and image decoder */
50 /* decoder candidates */
60 splash_find_data(splash_decoder_t *decoder) in splash_find_data() argument
66 if (decoder->data_type == NULL) in splash_find_data()
69 image_module = preload_search_by_type(decoder->data_type); in splash_find_data()
81 decoder->data = ptr; in splash_find_data()
82 decoder->data_size = sz; in splash_find_data()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dlvds-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
25 [VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
28 Those devices have been marketed under the FPD-Link and FlatLink brand names
34 - items:
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dingenic,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic Video Processing Unit
10 Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from
16 - Paul Cercueil <paul@crapouillou.net>
20 const: ingenic,jz4770-vpu-rproc
24 - description: aux registers
25 - description: tcsm0 registers
26 - description: tcsm1 registers
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