Searched +full:vf610 +full:- +full:mscm +full:- +full:ir (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,vf610-mscm-ir.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Freescale Vybrid Miscellaneous System Control - Interrupt Router10 The MSCM IP contains multiple sub modules, this binding describes the second15 which comes with a Cortex-A5/Cortex-M4 combination).19 - Frank Li <Frank.Li@nxp.com>23 const: fsl,vf610-mscm-ir31 The handle to the MSCM CPU configuration node, required[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (C) 2014-2015 Toradex AG6 * IRQ chip driver for MSCM interrupt router available on Vybrid SoC's.9 * one of the two available CPU's on Vybrid VF6xx SoC's (Cortex-A5 or10 * Cortex-M4). The router will be configured transparently on a IRQ14 * CPU 0, CPU 1 or both. The routing is useful for dual-core18 * o It is required to setup the interrupt router even on single-core28 #include <dt-bindings/interrupt-controller/arm-gic.h>55 data->saved_irsprc[i] = readw_relaxed(data->mscm_ir_base + MSCM_IRSPRC(i)); in vf610_mscm_ir_save()63 writew_relaxed(data->saved_irsprc[i], data->mscm_ir_base + MSCM_IRSPRC(i)); in vf610_mscm_ir_restore()[all …]