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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dti,cc1352p7.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Ayush Singh <ayushdevel1325@gmail.com>
21 - description: high-frequency main system (MCU and peripherals) clock
22 - description: low-frequency system clock
24 clock-names:
26 - const: sclk_hf
27 - const: sclk_lf
29 reset-gpios:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi-phy-7nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-ph
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H A Ddsi-phy-10nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-ph
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H A Ddsi.txt5 - compatible:
6 * "qcom,mdss-dsi-ctrl"
7 - reg: Physical base address and length of the registers of controller
8 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the DSI block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: Phandles to device clocks.
13 - clock-names: the following clocks are required:
25 - assigned-clocks: Parents of "byte" and "pixel" for the given platform.
26 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
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H A Dqcom,sdm845-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mds
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H A Dqcom,msm8998-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mds
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H A Dqcom,sm8150-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
22 - const: qcom,sm8150-mdss
26 - description: Display AHB clock from gcc
27 - description: Display hf axi clock
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H A Dqcom,sm8450-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mds
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H A Dqcom,sm8250-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mds
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H A Dqcom,sm7150-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm7150-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Danila Tikhonov <danila@jiaxyga.com>
13 SM7150 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm7150-mdss
24 - description: Display ahb clock from gcc
25 - description: Display hf axi clock
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
37 "silabs,si5344" - Si5344 A/B/C/D
38 "silabs,si5345" - Si5345 A/B/C/D
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8150-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/usb/pd.h>
18 compatible = "qcom,sm8150-hdk", "qcom,sm8150";
19 chassis-type = "embedded";
26 stdout-path = "serial0:115200n8";
29 vph_pwr: vph-pwr-regulator {
30 compatible = "regulator-fixed";
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H A Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
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H A Dsm8250-xiaomi-elish-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2022-2024 Jianhua Lu <lujianhua000@gmail.com>
6 #include <dt-bindings/arm/qcom,ids.h>
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/usb/pd.h>
20 /delete-node/ &adsp_mem;
21 /delete-node/ &cdsp_secure_heap;
22 /delete-node/ &slpi_mem;
23 /delete-node/ &spss_mem;
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H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include "sdm845-wcd9340.dtsi"
21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>;
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H A Dqcs8550-aim300.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 regulators-0 {
17 compatible = "qcom,pm8550-rpmh-regulators";
18 qcom,pmic-id = "b";
20 vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>;
21 vdd-l2-l13-l14-supply = <&vreg_bob1>;
22 vdd-l3-supply = <&vreg_s4g_1p25>;
23 vdd-l5-l16-supply = <&vreg_bob1>;
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H A Dsdm845-xiaomi-beryllium-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8 #include <dt-binding
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H A Dsdm845-xiaomi-beryllium.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
7 #include <dt-bindings/sound/qcom,q6afe.h>
8 #include <dt-bindings/sound/qcom,q6asm.h>
17 /delete-node/ &tz_mem;
18 /delete-node/ &adsp_mem;
19 /delete-node/ &wlan_msa_mem;
20 /delete-node/ &mpss_region;
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H A Dsdm670-google-sargo.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
4 * xiaomi-lavender device tree, and oneplus-common device tree.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
19 /delete-node/ &mpss_region;
20 /delete-node/ &venus_mem;
[all …]
H A Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpi
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H A Dsdm845-shift-axolotl.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
20 qcom,msm-id = <321 0x20001>;
21 qcom,board-id = <11 0>;
30 #address-cells = <2>;
31 #size-cells = <2>;
34 stdout-path = "serial0";
[all …]
H A Dqcm6490-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 /delete-node/ &ipa_fw_mem;
23 /delete-node/ &rmtfs_mem;
24 /delete-node/ &adsp_mem;
25 /delete-node/ &cdsp_mem;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-osd335x-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 cpu0-supply = <&dcdc2_reg>;
31 opp-1000000000 {
33 opp-supported-hw = <0x06 0x0100>;
38 i2c0_pins: pinmux-i2c
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H A Dam335x-lxm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 NovaTech LLC - https://www.novatechweb.com
5 /dts-v1/;
11 compatible = "novatech,am335x-lxm", "ti,am33xx";
15 cpu0-supply = <&vdd1_reg>;
24 /* Power supply provides a fixed 5V @2A */
26 compatible = "regulator-fixed";
27 regulator-name = "vbat";
28 regulator-min-microvolt = <5000000>;
29 regulator-max-microvolt = <5000000>;
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H A Dam335x-chilisom.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "grinn,am335x-chilisom", "ti,am33xx";
15 cpu0-supply = <&dcdc2_reg>;
26 pinctrl-names = "default";
28 i2c0_pins: i2c0-pins {
29 pinctrl-single,pins = <
35 nandflash_pins: nandflash-pins {
36 pinctrl-single,pins = <
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