Searched +full:vcu +full:- +full:logicoreip +full:- +full:1 (Results 1 – 1 of 1) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/xlnx,vcu.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#6 title: LogicoreIP designed compatible with Xilinx ZYNQ family.9 - Rohit Visavalia <rohit.visavalia@amd.com>12 LogicoreIP design to provide the isolation between processing system19 - enum:20 - xlnx,vcu21 - xlnx,vcu-logicoreip-1.0[all …]