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/linux/drivers/gpu/drm/tiny/
H A Dsharp-memory.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
61 const struct drm_display_mode *mode; member
74 u8 vcom; member
114 static inline void sharp_memory_set_tx_buffer_mode(u8 *buffer, u8 mode, u8 vcom) in sharp_memory_set_tx_buffer_mode() argument
116 *buffer = mode | (vcom << 1); in sharp_memory_set_tx_buffer_mode()
142 iosys_map_set_vaddr(&vmap, dma_obj->vaddr); in sharp_memory_set_tx_buffer_data()
155 u32 pitch = smd->pitch; in sharp_memory_update_display()
156 u8 vcom = smd->vcom; in sharp_memory_update_display() local
157 u8 *tx_buffer = smd->tx_buffer; in sharp_memory_update_display()
158 u32 tx_buffer_size = smd->tx_buffer_size; in sharp_memory_update_display()
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H A Drepaper.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DRM driver for Pervasive Displays RePaper branded e-ink panels
5 * Copyright 2013-2017 Pervasive Displays, Inc.
52 enum repaper_stage { /* Image pixel -> Display pixel */
53 REPAPER_COMPENSATE, /* B -> W, W -> B (Current Image) */
54 REPAPER_WHITE, /* B -> N, W -> W (Current Image) */
55 REPAPER_INVERSE, /* B -> N, W -> B (New Image) */
56 REPAPER_NORMAL /* B -> B, W -> W (New Image) */
68 const struct drm_display_mode *mode; member
112 return -ENOMEM; in repaper_spi_transfer()
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/linux/drivers/staging/fbtft/
H A Dfb_st7789v.c1 // SPDX-License-Identifier: GPL-2.0+
34 * enum st7789v_command - ST7789V display controller commands
38 * @VCOMS: VCOM setting
42 * @VCMOFSET: VCOM offset set
86 * init_tearing_effect_line() - init tearing effect line.
93 struct device *dev = par->info->device; in init_tearing_effect_line()
130 * init_display() - initialize the display controller
147 par->fbtftops.reset(par); in init_display()
153 /* turn off sleep mode */ in init_display()
157 /* set pixel format to RGB-565 */ in init_display()
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H A Dfb_hx8340bn.c1 // SPDX-License-Identifier: GPL-2.0+
5 * This display uses 9-bit SPI: Data/Command bit + 8 data bits
6 * For platforms that doesn't support 9-bit, the driver is capable
7 * of emulating this using 8-bit transfer.
8 * This is done by transferring eight 9-bit words in 9 bytes.
32 MODULE_PARM_DESC(emulate, "Force emulation in 9-bit mode");
36 par->fbtftops.reset(par); in init_display()
38 /* BTL221722-276L startup sequence, from datasheet */ in init_display()
49 * This command turns off sleep mode. in init_display()
50 * In this mode the DC/DC converter is enabled, Internal oscillator in init_display()
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H A Dfb_upd161704.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2014 Seong-Woo Kim
26 par->fbtftops.reset(par); in init_display()
37 /* y-setting */ in init_display()
68 write_reg(par, 0x001E, 0x0009); /* VCOM output setting */ in init_display()
69 write_reg(par, 0x001F, 0x0035); /* VCOM amplitude setting */ in init_display()
97 /* Color mode */ in init_display()
98 /*GS = 0: 260-k color (64 gray scale), GS = 1: 8 color (2 gray scale) */ in init_display()
115 switch (par->info->var.rotate) { in set_addr_win()
123 write_reg(par, 0x0006, WIDTH - 1 - xs); in set_addr_win()
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H A Dfb_ili9481.c1 // SPDX-License-Identifier: GPL-2.0+
22 /* SLP_OUT - Sleep out */
23 -1, MIPI_DCS_EXIT_SLEEP_MODE,
24 -2, 50,
26 -1, 0xD0, 0x07, 0x42, 0x18,
27 /* VCOM */
28 -1, 0xD1, 0x00, 0x07, 0x10,
29 /* Power setting for norm. mode */
30 -1, 0xD2, 0x01, 0x02,
32 -1, 0xC0, 0x10, 0x3B, 0x00, 0x02, 0x11,
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H A Dfb_ili9486.c1 // SPDX-License-Identifier: GPL-2.0+
21 /* Interface Mode Control */
22 -1, 0xb0, 0x0,
23 -1, MIPI_DCS_EXIT_SLEEP_MODE,
24 -2, 250,
26 -1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55,
28 -1, 0xC2, 0x44,
29 /* VCOM Control 1 */
30 -1, 0xC5, 0x00, 0x00, 0x00, 0x00,
32 -1, 0xE0, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
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H A Dfb_hx8353d.c1 // SPDX-License-Identifier: GPL-2.0+
22 par->fbtftops.reset(par); in init_display()
31 /* VCOM */ in init_display()
43 /* SLPOUT - Sleep out & booster on */ in init_display()
47 /* DISPON - Display On */ in init_display()
82 * madctl - memory data access control in set_var()
84 * 1. mode selection pin srgb in set_var()
87 * rgb-bgr order color filter panel: 0=rgb, 1=bgr in set_var()
89 switch (par->info->var.rotate) { in set_var()
92 mx | my | (par->bgr << 3)); in set_var()
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H A Dfb_ili9341.c1 // SPDX-License-Identifier: GPL-2.0+
5 * This display uses 9-bit SPI: Data/Command bit + 8 data bits
6 * For platforms that doesn't support 9-bit, the driver is capable
7 * of emulating this using 8-bit transfer.
8 * This is done by transferring eight 9-bit words in 9 bytes.
31 par->fbtftops.reset(par); in init_display()
33 /* startup sequence for MI0283QT-9A */ in init_display()
37 /* --------------------------------------------------------- */ in init_display()
44 /* ------------power control-------------------------------- */ in init_display()
47 /* ------------VCOM --------- */ in init_display()
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H A Dfb_ili9163.c1 // SPDX-License-Identifier: GPL-2.0+
33 /* (In normal mode/Full colors) */
34 #define CMD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle mode/8-colors) */
36 /* (In Partial mode/full colors) */
50 #define CMD_VCOMOFFS 0xC7 /* VCOM Offset Control */
57 * http://www.ebay.com/itm/Replace-Nokia-5110-LCD-1-44-Red-Serial-128X128-SPI-
58 * Color-TFT-LCD-Display-Module-/271422122271
70 #define __OFFSET 32 /*see note 2 - this is the red version */
72 #define __OFFSET 0 /*see note 2 - this is the black version */
77 par->fbtftops.reset(par); in init_display()
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/linux/drivers/gpu/drm/panel/
H A Dpanel-ilitek-ili9341.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * - 16-bit parallel RGB interface
7 * - 18-bit parallel RGB interface
8 * - 4-line serial spi interface
13 * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
46 #define ILI9341_VCOM1 0xc5 /* VCOM Control 1 register */
47 #define ILI9341_VCOM2 0xc7 /* VCOM Control 2 register */
58 #define ILI9341_ETMOD 0xb7 /* Entry mode set */
114 /* struct ili9341_config - the system specific ILI9341 configuration */
117 /* mode: the drm display mode */
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H A Dpanel-kingdisplay-kd097d04.c1 // SPDX-License-Identifier: GPL-2.0+
46 /* VCOM disable */
50 /* VCOM setting */
185 err = mipi_dsi_dcs_set_display_off(kingdisplay->link); in kingdisplay_panel_disable()
187 dev_err(panel->dev, "failed to set display off: %d\n", err); in kingdisplay_panel_disable()
197 err = mipi_dsi_dcs_enter_sleep_mode(kingdisplay->link); in kingdisplay_panel_unprepare()
199 dev_err(panel->dev, "failed to enter sleep mode: %d\n", err); in kingdisplay_panel_unprepare()
206 gpiod_set_value_cansleep(kingdisplay->enable_gpio, 0); in kingdisplay_panel_unprepare()
208 err = regulator_disable(kingdisplay->supply); in kingdisplay_panel_unprepare()
221 gpiod_set_value_cansleep(kingdisplay->enable_gpio, 0); in kingdisplay_panel_prepare()
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H A Dpanel-novatek-nt35510.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * When powered on the display is by default in 480x800 mode.
16 * per-panel, e.g. for physical size.
76 #define NT35510_DOPCTR_0_DSIM BIT(4) /* Enable video mode on DSI */
147 * struct nt35510_config - the display-specific NT35510 configuration
150 * A = normal / idle off mode
151 * B = idle on mode
152 * C = partial / idle off mode
173 * +------------------------------------------->
188 * @mode: the display mode. This is only relevant outside the panel
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H A Dpanel-himax-hx8394.c1 // SPDX-License-Identifier: GPL-2.0
5 * - HannStar HSD060BHW4 5.99" MIPI-DSI panel
9 * Based on drivers/gpu/drm/panel/panel-sitronix-st7703.c
15 #include <linux/media-bus-format.h>
27 #define DRV_NAME "panel-himax-hx8394"
29 /* Manufacturer specific commands sent via DSI, listed in HX8394-F datasheet */
79 const struct drm_display_mode *mode; member
93 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in hsd060bhw4_init_sequence()
154 /* Unknown command, not listed in the HX8394-F datasheet */ in hsd060bhw4_init_sequence()
158 /* 5.19.5 SETVCOM: Set VCOM voltage (B6h) */ in hsd060bhw4_init_sequence()
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H A Dpanel-sitronix-st7701.c1 // SPDX-License-Identifier: GPL-2.0+
37 #define ST7701_CMD2_BK1_VCOM 0xB1 /* VCOM amplitude setting */
94 (((typeof(_mask))(_val) << (__builtin_ffsll(_mask) - 1)) & (_mask))
106 const struct drm_display_mode *mode; member
116 const u32 vcom_uv; /* Vcom in uV */
155 return mipi_dsi_dcs_write(st7701->dsi, cmd, seq, len); in st7701_dsi_write()
161 return mipi_dbi_command_stackbuf(&st7701->dbi, cmd, seq, len); in st7701_dbi_write()
167 st7701->write_command(st7701, cmd, d, ARRAY_SIZE(d)); \
172 const struct st7701_panel_desc *desc = st7701->desc; in st7701_vgls_map()
177 { -7060, 0x0 }, { -7470, 0x1 }, in st7701_vgls_map()
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H A Dpanel-widechips-ws2401.c1 // SPDX-License-Identifier: GPL-2.0
5 * Found in the Samsung Galaxy Ace 2 GT-I8160 mobile phone.
7 * Inspired by code and know-how in the vendor driver by Gareth Phillips.
18 #include <linux/media-bus-format.h>
29 #define WS2401_BCMODE 0xc1 /* Backlight control mode */
33 #define WS2401_WRMIE 0xc7 /* Write MIE mode */
46 #define WS2401_VCOMCTL 0xf4 /* VCOM control */
58 * struct ws2401 - state container for a panel controlled by the WS2401
106 struct mipi_dbi *dbi = &ws->dbi; in ws2401_read_mtp_id()
112 dev_err(ws->dev, "unable to read MTP ID 1\n"); in ws2401_read_mtp_id()
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H A Dpanel-raydium-rm68200.c1 // SPDX-License-Identifier: GPL-2.0
22 #define MCS_CMD_MODE_SW 0xFE /* CMD Mode Switch */
30 #define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
40 #define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
45 /* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
105 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in rm68200_dcs_write_buf()
110 dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write buffer failed: %d\n", err); in rm68200_dcs_write_buf()
115 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in rm68200_dcs_write_cmd()
120 dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write failed: %d\n", err); in rm68200_dcs_write_cmd()
131 * This panel is not able to auto-increment all cmd addresses so for some of
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H A Dpanel-orisetech-otm8009a.c1 // SPDX-License-Identifier: GPL-2.0
29 #define MCS_P_DRV_M 0xC0B4 /* Panel Driving Mode */
30 #define MCS_OSC_ADJ 0xC181 /* Oscillator Adjustment for Idle/Normal mode */
31 #define MCS_RGB_VID_SET 0xC1A1 /* RGB Video Mode Setting */
35 #define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
57 #define MCS_VCOMDC 0xD900 /* VCOM Voltage Setting */
59 #define MCS_GMCT2_2N 0xE200 /* Gamma Correction 2.2- Setting */
115 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in otm8009a_dcs_write_buf()
118 dev_warn(ctx->dev, "mipi dsi dcs write buffer failed\n"); in otm8009a_dcs_write_buf()
135 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in otm8009a_init_sequence()
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H A Dpanel-feixin-k101-im2ba02.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2020 Icenowy Zheng <icenowy@aosc.io>
50 /* Lane number, 0x02 - 3 lanes, 0x03 - 4 lanes */
61 /* Set VCOM */
73 { .data = { 0x1B, 0xBF } }, /* VGMN = -4.5V */
78 { .data = { 0x20, 0x28 } }, /* VGL_R = -11V */
79 { .data = { 0x21, 0x28 } }, /* VGL_R2 = -11V */
308 struct mipi_dsi_device *dsi = ctx->dsi; in k101_im2ba02_prepare()
312 ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); in k101_im2ba02_prepare()
318 gpiod_set_value(ctx->reset, 1); in k101_im2ba02_prepare()
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H A Dpanel-leadtek-ltk500hd1829.c1 // SPDX-License-Identifier: GPL-2.0+
5 * base on panel-kingdisplay-kd097d04.c
31 const struct drm_display_mode *mode; member
52 { 0x80, 0x03 }, /* 0X03:4-LANE; 0X02:3-LANE; 0X01:2-LANE */
55 /* Set VCOM */
67 { 0x20, 0x28 }, /* VGL_R = -12V */
68 { 0x21, 0x28 }, /* VGL_R2 = -12V */
83 { 0x41, 0xA0 }, /* LN = 640->1280 line */
91 { 0x59, 0x0A }, /* VCL = -2.9V */
93 { 0x5B, 0x14 }, /* VGL = -11V */
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/linux/arch/sh/boards/mach-kfr2r09/
H A Dlcd_wqvga.c1 // SPDX-License-Identifier: GPL-2.0
7 * Register settings based on the out-of-tree t33fb.c driver
22 /* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made
24 * communicating with the main port of the LCDC using an 18-bit SYS interface.
30 0x02, /* WEMODE: 1=cont, 0=one-shot */
62 return so->read_data(sohandle); in read_reg()
70 so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */ in write_reg()
72 so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */ in write_reg()
140 /* exit deep standby mode */ in display_on()
148 /* display mode and frame memory write mode */ in display_on()
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-skov-reva.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include <dt-bindings/leds/common.h>
26 compatible = "pwm-backlight";
27 pinctrl-0 = <&pinctrl_backlight>;
29 power-supply = <&reg_24v>;
30 enable-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
31 brightness-levels = <0 255>;
32 num-interpolated-steps = <17>;
33 default-brightness-level = <8>;
38 compatible = "gpio-leds";
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-skov-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
10 stdout-path = &uart2;
19 mdio-gpio0 = &mdio;
28 iio-hwmon {
29 compatible = "iio-hwmon";
30 io-channels = <&adc 0>, /* 24V */
35 compatible = "gpio-leds";
37 led-0 {
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/linux/drivers/video/backlight/
H A Dtdo24m.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
32 int (*adj_mode)(struct tdo24m *lcd, int mode);
36 int mode; member
44 #define CMD_NULL (-1)
146 CMD1(0xba, 0x01), /* Display mode (1) */
147 CMD1(0xbb, 0x00), /* Display mode (2) */
148 CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
151 CMD1(0xb2, 0x33), /* Booster mode setup */
155 CMD1(0xb6, 0x40), /* VCOM voltage */
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/linux/sound/soc/codecs/
H A Dak4642.c1 // SPDX-License-Identifier: GPL-2.0
3 // ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
23 #include <linux/clk-provider.h>
76 #define PMVCM (1 << 6) /* VCOM Power Management */
102 #define LOPS (1 << 6) /* Stero Line-out Power Save Mode */
153 * min : 0xFE : -115.0 dB
156 static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
177 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in ak4642_lout_event()
182 /* Power save mode ON */ in ak4642_lout_event()
187 /* Power save mode OFF */ in ak4642_lout_event()
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