| /freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
| H A D | tsan_vector_clock.cpp | 31 m128* vclk = reinterpret_cast<m128*>(clk_); in Reset()
32 for (uptr i = 0; i < kVectorClockSize; i++) _mm_store_si128(&vclk[i], z); in Reset()
95 m128* __restrict vclk = reinterpret_cast<m128*>(clk_); in ReleaseStoreAcquire() local
98 m128 c = _mm_load_si128(&vclk[i]); in ReleaseStoreAcquire()
101 _mm_store_si128(&vclk[i], m); in ReleaseStoreAcquire()
115 m128* __restrict vclk = reinterpret_cast<m128*>(clk_); in ReleaseAcquire() local
117 m128 c = _mm_load_si128(&vclk[i]); in ReleaseAcquire()
121 _mm_store_si128(&vclk[i], m); in ReleaseAcquire()
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | aspeed-video.txt | 13 - clock-names: "vclk" and "eclk"
29 clock-names = "vclk", "eclk";
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| H A D | renesas,fcp.yaml | 80 - const: vclk
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| H A D | renesas,vsp1.yaml | 89 - const: vclk
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| /freebsd/sys/contrib/device-tree/Bindings/display/samsung/ |
| H A D | samsung,fimd.yaml | 46 VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|??
119 samsung,invert-vclk:
185 samsung,invert-vclk;
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | renesas,rzg2l-du.yaml | 44 - const: vclk
130 clock-names = "aclk", "pclk", "vclk";
|
| H A D | xylon,logicvc-display.yaml | 45 # vclk is required and must be provided as first item.
46 - const: vclk
228 clock-names = "vclk", "lvdsclk";
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| H A D | amlogic,meson-vpu.yaml | 20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
53 The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
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| /freebsd/sys/contrib/device-tree/src/arm64/renesas/ |
| H A D | r9a07g043u.dtsi | 139 clock-names = "aclk", "pclk", "vclk";
151 clock-names = "aclk", "pclk", "vclk";
163 clock-names = "aclk", "pclk", "vclk";
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| H A D | r9a07g044.dtsi | 789 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
821 clock-names = "aclk", "pclk", "vclk";
834 clock-names = "aclk", "pclk", "vclk";
846 clock-names = "aclk", "pclk", "vclk";
|
| H A D | r9a07g054.dtsi | 794 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
827 clock-names = "aclk", "pclk", "vclk";
840 clock-names = "aclk", "pclk", "vclk";
853 clock-names = "aclk", "pclk", "vclk";
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | renesas,dsi.yaml | 66 - const: vclk
156 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
|
| /freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
| H A D | samsung-fimd.txt | 40 - samsung,invert-vclk: video clock signal is inverted
60 VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|??
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| /freebsd/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | exynos5250-spring.dts | 94 samsung,invert-vclk;
|
| H A D | exynos4210-universal_c210.dts | 267 samsung,invert-vclk;
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| H A D | exynos5250-snow-common.dtsi | 267 samsung,invert-vclk;
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| H A D | exynos4210-i9100.dts | 377 samsung,invert-vclk;
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| H A D | s5pv210-aries.dtsi | 600 samsung,invert-vclk;
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| H A D | exynos5800-peach-pi.dts | 201 samsung,invert-vclk;
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| H A D | exynos5420-peach-pit.dts | 192 samsung,invert-vclk;
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| H A D | exynos4412-p4note.dtsi | 343 samsung,invert-vclk;
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| H A D | exynos4212-tab3.dtsi | 443 samsung,invert-vclk;
|
| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-g4.dtsi | 243 clock-names = "vclk", "eclk";
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| H A D | aspeed-g6.dtsi | 431 clock-names = "vclk", "eclk";
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| H A D | aspeed-g5.dtsi | 298 clock-names = "vclk", "eclk";
|