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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Drk808.txt11 - compatible: "rockchip,rk805"
12 - compatible: "rockchip,rk808"
13 - compatible: "rockchip,rk809"
14 - compatible: "rockchip,rk817"
15 - compatible: "rockchip,rk818"
16 - reg: I2C slave address
17 - interrupts: the interrupt outputs of the controller.
18 - #clock-cells: from common clock binding; shall be set to 1 (multiple clock
19 outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
22 - clock-output-names: From common clock binding to override the
[all …]
H A Drockchip,rk808.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk808
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
33 clock-output-names:
38 rockchip,system-power-controller:
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H A Drockchip,rk818.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk818
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
33 clock-output-names:
38 rockchip,system-power-controller:
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H A Drockchip,rk809.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Drockchip,rk806.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk809
22 - rockchip,rk817
30 '#clock-cells':
32 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
39 clock-names:
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
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H A Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 sdcard-supply = <&vccio_sd>;
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
57 vcc9-supply = <&vcc_5v>;
61 regulator-name = "vccio_sd";
62 regulator-min-microvolt = <1800000>;
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H A Drk3288-evb-rk808.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3288-evb.dtsi"
8 compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
12 clock-frequency = <400000>;
17 interrupt-parent = <&gpio0>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pmic_int &global_pwroff>;
21 rockchip,system-power-controller;
22 wakeup-source;
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H A Drk3188-px3-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "Rockchip PX3-EVB";
12 compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
20 stdout-path = "serial2:115200n8";
28 gpio-keys {
29 compatible = "gpio-keys";
32 key-power {
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H A Drk3288-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vccio_flash";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
19 vin-supply = <&vcc_io>;
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H A Drv1126-edgeble-neu2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 enable-activ
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H A Drk3036-kylin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
9 compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
12 stdout-path = "serial2:115200n8";
20 hdmi_con: hdmi-con {
21 compatible = "hdmi-connector";
26 remote-endpoint = <&hdmi_out_con>;
31 leds: gpio-leds {
32 compatible = "gpio-leds";
34 work_led: led-0 {
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H A Drv1126-sonoff-ihost.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 stdout-path = "serial2:1500000n8";
19 vcc5v0_sys: regulator-vcc5v0-sys {
20 compatible = "regulator-fixed";
21 regulator-name = "vcc5v0_sys";
22 regulator-always-on;
23 regulator-boot-on;
24 regulator-min-microvolt = <5000000>;
25 regulator-max-microvolt = <5000000>;
28 sdio_pwrseq: pwrseq-sdio {
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Dpx30-engicam-px30-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "engicam,px30-core", "rockchip,px30";
21 cpu-supply = <&vdd_arm>;
25 cpu-supply = <&vdd_arm>;
29 cpu-supply = <&vdd_arm>;
33 cpu-supply = <&vdd_arm>;
37 cap-mmc-highspeed;
38 mmc-hs200-1_8v;
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H A Drk3368-px5-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
12 compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
20 stdout-path = "serial4:115200n8";
28 keys: gpio-keys {
29 compatible = "gpio-keys";
30 pinctrl-names = "default";
31 pinctrl-0 = <&pwr_key>;
33 key-power {
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H A Drk3368-geekbox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
20 stdout-path = "serial2:115200n8";
28 ext_gmac: gmac-clk {
29 compatible = "fixed-clock";
30 clock-frequency = <125000000>;
31 clock-outpu
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H A Dpx30-firefly-jd4-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
11 compatible = "firefly,px30-jd4-core", "rockchip,px30";
13 emmc_pwrseq: emmc-pwrseq {
14 compatible = "mmc-pwrseq-emmc";
15 pinctrl-0 = <&emmc_reset>;
16 pinctrl-names = "default";
17 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
20 vcc5v0_sys: vcc5v0-sys-regulator {
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H A Drk3368-lion.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
16 stdout-path = "serial0:115200n8";
19 ext_gmac: gmac-clk {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
23 #clock-cells = <0>;
27 compatible = "i2c-mux-gpio";
28 #address-cells = <1>;
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H A Dpx30-ringneck.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
18 emmc_pwrseq: emmc-pwrseq {
19 compatible = "mmc-pwrseq-emmc";
20 pinctrl-0 = <&emmc_reset>;
21 pinctrl-names = "default";
22 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
[all …]
H A Drk3568-radxa-cm3i.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/rockchip.h>
16 stdout-path = "serial2:115200n8";
19 gpio-leds {
20 compatible = "gpio-leds";
22 led_user: led-0 {
26 linux,default-trigger = "heartbeat";
27 pinctrl-names = "default";
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H A Drk3568-fastrhino-r66s.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
13 stdout-path = "serial2:1500000n8";
16 gpio-keys {
17 compatible = "gpio-keys";
[all …]
H A Drk3588-edgeble-neu6a-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
14 gpio-leds {
15 compatible = "gpio-leds";
17 led_user: led-0 {
21 linux,default-trigger = "heartbeat";
22 pinctrl-names = "default";
23 pinctrl-0 = <&led_user_en>;
27 vcc12v_dcin: vcc12v-dcin-regulator {
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H A Drk3399pro-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/pwm/pwm.h>
13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
21 vcc3v3_pcie: vcc-pcie-regulato
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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-g12b-odroid-go-ultra.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12b-s922x.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-toacodec.h>
13 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
16 compatible = "hardkernel,odroid-go-ultra", "amlogic,s922x", "amlogic,g12b";
17 model = "Hardkernel ODROID-GO-Ultra";
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