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/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,usb-vbus-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/qcom,usb-vbus-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The Qualcomm PMIC VBUS output regulator driver
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 This regulator driver controls the VBUS output by the Qualcomm PMIC. This
14 regulator will be enabled in situations where the device is required to
18 - $ref: regulator.yaml#
23 - enum:
[all …]
H A Dsiliconmitus,sm5703-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/siliconmitus,sm5703-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Markuss Broks <markuss.broks@gmail.com>
15 Regulator nodes should be named as USBLDO_<number>, BUCK, VBUS, LDO_<number>.
17 binding for regulators at Documentation/devicetree/bindings/regulator/regulator.txt.
22 $ref: regulator.yaml#
25 Properties for the BUCK regulator.
27 vbus:
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsunxi-common-regulators.dtsi2 * sunxi boards common regulator (ahci target power supply, usb-vbus) code
4 * Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/gpio/gpio.h>
48 reg_ahci_5v: ahci-5v {
49 compatible = "regulator-fixed";
50 regulator-name = "ahci-5v";
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 regulator-boot-on;
[all …]
H A Dsun8i-a83t-cubietruck-plus.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
63 hdmi-connector {
64 compatible = "hdmi-connector";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-prti6q.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
11 stdout-path = &uart4;
14 reg_3v3: regulator-3v3 {
15 compatible = "regulator-fixed";
16 regulator-name = "3v3";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
21 reg_usb_h1_vbus: regulator-h1-vbus {
[all …]
H A Dimx6ull-colibri-iris.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2018-2022 Toradex
8 stdout-path = "serial0:115200n8";
11 gpio-keys {
12 compatible = "gpio-keys";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
17 label = "Wake-Up";
20 debounce-interval = <10>;
21 wakeup-source;
[all …]
H A Dimx6ull-colibri-eval-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2017-2022 Toradex
8 stdout-path = "serial0:115200n8";
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <16000000>;
18 reg_3v3: regulator-3v3 {
19 compatible = "regulator-fixed";
20 regulator-name = "3.3V";
21 regulator-min-microvolt = <3300000>;
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Drenesas,rzg2l-usbphy-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/renesas,rzg2l-usbphy-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
19 - enum:
20 - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
21 - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
22 - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
23 - const: renesas,rzg2l-usbphy-ctrl
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dusb-nop-xceiv.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-nop-xceiv.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 const: usb-nop-xceiv
19 clock-names:
22 clock-frequency: true
24 '#phy-cells':
27 vcc-supply:
[all …]
/linux/drivers/regulator/
H A Dqcom_usb_vbus-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // Qualcomm PMIC VBUS output regulator driver
12 #include <linux/regulator/driver.h>
13 #include <linux/regulator/of_regulator.h>
46 struct device *dev = &pdev->dev; in qcom_usb_vbus_regulator_probe()
54 ret = of_property_read_u32(dev->of_node, "reg", &base); in qcom_usb_vbus_regulator_probe()
60 regmap = dev_get_regmap(dev->parent, NULL); in qcom_usb_vbus_regulator_probe()
63 return -ENOENT; in qcom_usb_vbus_regulator_probe()
66 init_data = of_get_regulator_init_data(dev, dev->of_node, in qcom_usb_vbus_regulator_probe()
69 return -ENOMEM; in qcom_usb_vbus_regulator_probe()
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis.dtsi"
9 compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30",
23 stdout-path = "serial0:115200n8";
46 hdmi-supply = <&reg_5v0>;
52 pex-perst-n-hog {
53 gpio-hog;
55 output-high;
[all …]
H A Dtegra124-apalis-v1.2-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis-v1.2.dtsi"
13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
28 stdout-path = "serial0:115200n8";
40 hdmi-supply = <&reg_5v0>;
46 pex-perst-n-hog {
[all …]
H A Dtegra124-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis.dtsi"
13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
27 stdout-path = "serial0:115200n8";
39 hdmi-supply = <&reg_5v0>;
45 pex-perst-n-hog {
46 gpio-hog;
[all …]
H A Dtegra30-apalis-v1.1-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis-v1.1.dtsi"
9 compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval",
10 "toradex,apalis_t30-v1.1", "toradex,apalis_t30",
24 stdout-path = "serial0:115200n8";
47 hdmi-supply = <&reg_5v0>;
53 pex-perst-n-hog {
54 gpio-hog;
[all …]
H A Dtegra30-colibri-eval-v3.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-colibri.dtsi"
9 compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30",
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <&reg_5v0>;
39 /* Colibri UART-A */
41 /delete-property/ dmas;
42 /delete-property/ dma-names;
[all …]
H A Dtegra20-colibri-iris.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20-colibri.dtsi"
9 compatible = "toradex,colibri_t20-iris", "toradex,colibri_t20",
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <&reg_5v0>;
41 bl-on {
49 hotplug-detect {
85 uart-a {
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
42 phy: ethernet-phy@0 {
43 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra234-p3701.dtsi1 // SPDX-License-Identifier: GPL-2.0
41 dma-controller@2930000 {
45 interrupt-controller@2a40000 {
58 vcc-supply = <&vdd_1v8_hs>;
59 address-width = <8>;
62 read-only;
70 compatible = "jedec,spi-nor";
72 spi-max-frequency = <102000000>;
73 spi-tx-bus-width = <4>;
74 spi-rx-bus-width = <4>;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d3_eds.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * at91-sama5d3_eds.dts - Device Tree file for the SAMA5D3 Ethernet
10 /dts-v1/;
15 compatible = "microchip,sama5d3-eds", "atmel,sama5d36",
19 stdout-path = "serial0:115200n8";
22 gpio-keys {
23 compatible = "gpio-keys";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_key_gpio>;
28 button-3 {
[all …]
/linux/Documentation/devicetree/bindings/power/supply/
H A Dmt6360_charger.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gene Chen <gene_chen@richtek.com>
18 const: mediatek,mt6360-chg
20 richtek,vinovp-microvolt:
25 usb-otg-vbus-regulator:
27 description: OTG boost regulator.
28 $ref: /schemas/regulator/regulator.yaml#
32 - compatible
[all …]
H A Drichtek,rt9471.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alina Yu <alina_yu@richtek.com>
11 - ChiYuan Huang <cy_huang@richtek.com>
14 RT9471 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
19 https://www.richtek.com/assets/product_file/RT9471=RT9471D/DS9471D-02.pdf
28 charge-enable-gpios:
32 wakeup-source: true
37 usb-otg-vbus-regulator:
[all …]
H A Drichtek,rt9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
11 - ChiaEn Wu <chiaen_wu@richtek.com>
14 RT9467 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
16 MOSFETs, input current sensing and regulation, high-accuracy voltage
20 The RT9467 also features USB On-The-Go (OTG) support. It also integrates
21 D+/D- pin for USB host/charging port detection.
24 https://www.richtek.com/assets/product_file/RT9467/DS9467-01.pdf
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]

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