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/linux/drivers/gpu/drm/
H A Ddrm_vblank.c2 * drm_irq.c IRQ and vblank support
43 * DOC: vblank handling
54 * scanlines is referred to as the vertical blanking region, or vblank for
98 * this programming has to both start and end in the same vblank. To help
101 * The interrupt is in this context named the vblank interrupt.
103 * The vblank interrupt may be fired at different points depending on the
122 * drm_crtc_handle_vblank() in its vblank interrupt handler for working vblank
129 * call drm_crtc_vblank_get() and release the vblank reference again with
130 * drm_crtc_vblank_put(). In between these two calls vblank interrupts are
133 * On many hardware disabling the vblank interrupt cannot be done in a race-free
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H A Ddrm_internal.h107 static inline void drm_vblank_flush_worker(struct drm_vblank_crtc *vblank) in drm_vblank_flush_worker() argument
109 kthread_flush_worker(vblank->worker); in drm_vblank_flush_worker()
112 static inline void drm_vblank_destroy_worker(struct drm_vblank_crtc *vblank) in drm_vblank_destroy_worker() argument
114 if (vblank->worker) in drm_vblank_destroy_worker()
115 kthread_destroy_worker(vblank->worker); in drm_vblank_destroy_worker()
118 int drm_vblank_worker_init(struct drm_vblank_crtc *vblank);
119 void drm_vblank_cancel_pending_works(struct drm_vblank_crtc *vblank);
120 void drm_handle_vblank_works(struct drm_vblank_crtc *vblank);
/linux/include/drm/
H A Ddrm_vblank.h40 * struct drm_pending_vblank_event - pending vblank event tracking
67 * Event payload for vblank events, requested through
82 * struct drm_vblank_crtc_config - vblank configuration for a CRTC
86 * @offdelay_ms: Vblank off delay in ms, used to determine how long
95 * for the exact semantics of immediate vblank disabling.
107 * struct drm_vblank_crtc - vblank tracking for a CRTC
109 * This structure tracks the vblank state for one CRTC.
111 * Note that for historical reasons - the vblank handling code is still shared
122 * @queue: Wait queue for vblank waiters.
126 * @disable_timer: Disable timer for the delayed vblank disabling
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H A Ddrm_device.h209 * If true, vblank interrupt will be disabled immediately when the
210 * refcount drops to zero, as opposed to via the vblank disable
213 * This can be set to true it the hardware has a working vblank counter
223 * @vblank:
225 * Array of vblank tracking structures, one per &struct drm_crtc. For
226 * historical reasons (vblank support predates kernel modesetting) this
230 struct drm_vblank_crtc *vblank; member
235 * Protects vblank count and time updates during vblank enable/disable
239 * @vbl_lock: Top-level vblank references lock, wraps the low-level
247 * Maximum value of the vblank registers. This value +1 will result in a
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H A Ddrm_crtc.h158 * Reflects the ability of a CRTC to send VBLANK events. This state
160 * atomic helpers will send out a fake VBLANK event during display
164 * One usage is for drivers and/or hardware without support for VBLANK
168 * drm_atomic_helper_check_modeset(), and a fake VBLANK event will be
173 * oneshot mode. In this case the fake VBLANK event is only generated
175 * core to fake VBLANK events when this part of the pipeline hasn't
186 * this case the driver will send the VBLANK event on its own when the
331 * last vblank before the display pipeline was shut off. The simplest
336 * undergoes an full modeset) the vblank timestamp and counter must
337 * be for the vblank right before the first frame that scans out the
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H A Ddrm_vblank_work.h12 * vblank passes, and then executes at realtime priority outside of IRQ
32 * @vblank: A pointer to &drm_vblank_crtc this work item belongs to.
34 struct drm_vblank_crtc *vblank; member
37 * @count: The target vblank this work will execute on. Drivers should
/linux/drivers/gpu/drm/i915/display/
H A Dintel_vblank.c27 * start of vblank:
30 * generate start of vblank interrupt (gen4+)
33 * | generate frame start interrupt (aka. vblank interrupt) (gmch)
62 * (depending on TRANSCONF settings) after the start of vblank
73 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc); in i915_get_vblank_counter() local
74 const struct drm_display_mode *mode = &vblank->hwmode; in i915_get_vblank_counter()
83 * vblank wait before enabling the TV encoder and so we in i915_get_vblank_counter()
84 * have to enable vblank interrupts while the frame counter in i915_get_vblank_counter()
85 * is still in a working state. However the core vblank code in i915_get_vblank_counter()
90 if (!vblank->max_vblank_count) in i915_get_vblank_counter()
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H A Dintel_crtc.c43 "[CRTC:%d:%s] vblank assertion failure (expected off, current on)\n", in assert_vblank_disabled()
83 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base); in intel_crtc_get_vblank_counter() local
88 if (!vblank->max_vblank_count) in intel_crtc_get_vblank_counter()
138 * requires vblank support on some platforms/outputs. in intel_crtc_vblank_on()
151 * requires vblank support on some platforms/outputs. in intel_crtc_vblank_off()
301 /* no hw vblank counter */
455 * Interrupt latency is critical for getting the vblank in intel_crtc_vblank_work_init()
456 * work executed as early as possible during the vblank. in intel_crtc_vblank_work_init()
505 * atomically regarding vblank. If the next vblank will happens within
506 * the next 100 us, this function waits until the vblank passes.
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dnv50.c42 container_of(notify, typeof(*chan), vblank.notify[notify->id]); in nv50_sw_chan_vblsem_release()
47 nvkm_wr32(device, 0x001710, 0x80000000 | chan->vblank.ctxdma); in nv50_sw_chan_vblsem_release()
51 nvkm_wr32(device, 0x001570, chan->vblank.offset); in nv50_sw_chan_vblsem_release()
52 nvkm_wr32(device, 0x001574, chan->vblank.value); in nv50_sw_chan_vblsem_release()
54 nvkm_wr32(device, 0x060010, chan->vblank.offset); in nv50_sw_chan_vblsem_release()
55 nvkm_wr32(device, 0x060014, chan->vblank.value); in nv50_sw_chan_vblsem_release()
68 case 0x018c: chan->vblank.ctxdma = data; return true; in nv50_sw_chan_mthd()
69 case 0x0400: chan->vblank.offset = data; return true; in nv50_sw_chan_mthd()
70 case 0x0404: chan->vblank.value = data; return true; in nv50_sw_chan_mthd()
72 if (data < device->disp->vblank.index_nr) { in nv50_sw_chan_mthd()
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H A Dgf100.c42 container_of(notify, typeof(*chan), vblank.notify[notify->id]); in gf100_sw_chan_vblsem_release()
49 nvkm_wr32(device, 0x06000c, upper_32_bits(chan->vblank.offset)); in gf100_sw_chan_vblsem_release()
50 nvkm_wr32(device, 0x060010, lower_32_bits(chan->vblank.offset)); in gf100_sw_chan_vblsem_release()
51 nvkm_wr32(device, 0x060014, chan->vblank.value); in gf100_sw_chan_vblsem_release()
64 chan->vblank.offset &= 0x00ffffffffULL; in gf100_sw_chan_mthd()
65 chan->vblank.offset |= (u64)data << 32; in gf100_sw_chan_mthd()
68 chan->vblank.offset &= 0xff00000000ULL; in gf100_sw_chan_mthd()
69 chan->vblank.offset |= data; in gf100_sw_chan_mthd()
72 chan->vblank.value = data; in gf100_sw_chan_mthd()
75 if (data < device->disp->vblank.index_nr) { in gf100_sw_chan_mthd()
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/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_vkms.c123 * We raced with the vblank hrtimer and previous work already computed in crc_generate_worker()
154 * The worker can fall behind the vblank hrtimer, make sure we catch up. in crc_generate_worker()
173 drm_dbg_driver(crtc->dev, "vblank timer missed %lld frames.\n", in vmw_vkms_vblank_simulate()
252 struct drm_vblank_crtc *vblank = &dev->vblank[pipe]; in vmw_vkms_get_vblank_timestamp() local
257 if (!READ_ONCE(vblank->enabled)) { in vmw_vkms_get_vblank_timestamp()
264 if (WARN_ON(*vblank_time == vblank->time)) in vmw_vkms_get_vblank_timestamp()
270 * only generated after all the vblank registers are updated) and what in vmw_vkms_get_vblank_timestamp()
271 * the vblank core expects. Therefore we need to always correct the in vmw_vkms_get_vblank_timestamp()
285 struct drm_vblank_crtc *vblank = &dev->vblank[pipe]; in vmw_vkms_enable_vblank() local
295 du->vkms.period_ns = ktime_set(0, vblank->framedur_ns); in vmw_vkms_enable_vblank()
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/linux/drivers/gpu/drm/vkms/
H A Dvkms_crtc.c26 pr_warn("%s: vblank timer overrun\n", __func__); in vkms_vblank_simulate()
31 DRM_ERROR("vkms failure on handling vblank"); in vkms_vblank_simulate()
64 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc); in vkms_enable_vblank() local
69 out->period_ns = ktime_set(0, vblank->framedur_ns); in vkms_enable_vblank()
89 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc); in vkms_get_vblank_timestamp() local
91 if (!READ_ONCE(vblank->enabled)) { in vkms_get_vblank_timestamp()
98 if (WARN_ON(*vblank_time == vblank->time)) in vkms_get_vblank_timestamp()
104 * only generated after all the vblank registers are updated) and what in vkms_get_vblank_timestamp()
105 * the vblank core expects. Therefore we need to always correct the in vkms_get_vblank_timestamp()
235 /* This lock is held across the atomic commit to block vblank timer in vkms_crtc_atomic_begin()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_mall_phantom.c210 * and regular P-State switching (i.e. VACTIVE/VBLANK) is not supported, or if
216 * In general we choose surfaces with the longest frame time first (better for SubVP + VBLANK).
219 * support MCLK switching naturally [i.e. ACTIVE or VBLANK]).
347 * 2. Check if the worst case overlap (VBLANK in middle of ACTIVE) for both
481 * for VBLANK: (VACTIVE region of the SubVP pipe can fit the MALL prefetch, VBLANK frame time, in dml2_svp_drr_schedulable()
482 * and the max of (VBLANK blanking time, MALL region)). in dml2_svp_drr_schedulable()
493 * subvp_vblank_schedulable: Determine if SubVP + VBLANK config is schedulable
496 * 1. Get timing for SubVP pipe, phantom pipe, and VBLANK pipe
497 * 2. If (SubVP Active - Prefetch > Vblank Frame Time + max(MALL region, Vblank blanking time))
499 * 3. If the VBLANK display is DRR, then take the DRR static schedulability path
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_display.c318 * to complete in this vblank? GET_DISTANCE_TO_VBLANKSTART provides in radeon_crtc_handle_vblank()
319 * distance to start of "fudged earlier" vblank in vpos, distance to in radeon_crtc_handle_vblank()
320 * start of real vblank in hpos. vpos >= 0 && hpos < 0 means we are in in radeon_crtc_handle_vblank()
321 * the last few scanlines before start of real vblank, where the vblank in radeon_crtc_handle_vblank()
324 * vblank. On pre-AVIVO hardware, flips also complete inside the real in radeon_crtc_handle_vblank()
325 * vblank, not only at leading edge, so if update_pending for hpos >= 0 in radeon_crtc_handle_vblank()
326 * == inside real vblank, the flip will complete almost immediately. in radeon_crtc_handle_vblank()
331 * vblank, leading to a delayed emission of the flip completion event. in radeon_crtc_handle_vblank()
333 * completing inside vblank, not only at leading edge of vblank. in radeon_crtc_handle_vblank()
342 /* crtc didn't flip in this target vblank interval, in radeon_crtc_handle_vblank()
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H A Dradeon_kms.c745 * VBlank related functions.
769 * of vblank, as is required by DRM core vblank counter handling. in radeon_get_vblank_counter_kms()
771 * incremented at start of vblank. We measure distance to start of in radeon_get_vblank_counter_kms()
772 * vblank in vpos. vpos therefore will be >= 0 between start of vblank in radeon_get_vblank_counter_kms()
783 * distance to start of vblank, instead of regular in radeon_get_vblank_counter_kms()
797 DRM_DEBUG_VBL("crtc %u: dist from vblank start %d\n", in radeon_get_vblank_counter_kms()
800 /* Bump counter if we are at >= leading edge of vblank, in radeon_get_vblank_counter_kms()
818 * radeon_enable_vblank_kms - enable vblank interrupt
820 * @crtc: crtc to enable vblank interrupt for
846 * radeon_disable_vblank_kms - disable vblank interrupt
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/linux/drivers/gpu/drm/omapdrm/
H A Domap_irq.c102 * omap_irq_enable_vblank - enable vblank interrupt events
105 * Enable vblank interrupts for @crtc. If the device doesn't have
106 * a hardware vblank counter, this routine should be a no-op, since
110 * Zero on success, appropriate errno if the given @crtc's vblank
132 * omap_irq_disable_vblank - disable vblank interrupt events
135 * Disable vblank interrupts for @crtc. If the device doesn't have
136 * a hardware vblank counter, this routine should be a no-op, since
/linux/drivers/media/test-drivers/vivid/
H A Dvivid-osd.c74 struct fb_vblank vblank; in vivid_fb_ioctl() local
76 memset(&vblank, 0, sizeof(vblank)); in vivid_fb_ioctl()
77 vblank.flags = FB_VBLANK_HAVE_COUNT | FB_VBLANK_HAVE_VCOUNT | in vivid_fb_ioctl()
79 vblank.count = 0; in vivid_fb_ioctl()
80 vblank.vcount = 0; in vivid_fb_ioctl()
81 vblank.hcount = 0; in vivid_fb_ioctl()
82 if (copy_to_user((void __user *)arg, &vblank, sizeof(vblank))) in vivid_fb_ioctl()
/linux/drivers/gpu/drm/loongson/
H A Dloongson_module.c17 MODULE_PARM_DESC(vblank, "Disable/Enable hw vblank support");
18 module_param_named(vblank, loongson_vblank, int, 0400);
/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_crtc.c58 struct mdp_irq vblank; member
74 mdp_irq_register(&get_kms(crtc)->base, &mdp4_crtc->vblank); in request_pending()
270 /* Disable/save vblank irq handling before power is disabled */ in mdp4_crtc_atomic_disable()
300 /* Restore vblank irq handling after power is enabled */ in mdp4_crtc_atomic_enable()
352 * buffered, and changing them other than from vblank seems to trigger
499 struct mdp4_crtc *mdp4_crtc = container_of(irq, struct mdp4_crtc, vblank); in mdp4_crtc_vblank_irq()
504 mdp_irq_unregister(&get_kms(crtc)->base, &mdp4_crtc->vblank); in mdp4_crtc_vblank_irq()
537 ret = wait_event_timeout(dev->vblank[drm_crtc_index(crtc)].queue, in mdp4_crtc_wait_for_flush_done()
542 dev_warn(dev->dev, "vblank time out, crtc=%d\n", mdp4_crtc->id); in mdp4_crtc_wait_for_flush_done()
552 return mdp4_crtc->vblank.irqmask; in mdp4_crtc_vblank()
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/linux/drivers/gpu/drm/ci/xfails/
H A Dvirtio_gpu-none-fails.txt5 kms_atomic_transition@plane-primary-toggle-with-vblank-wait,Fail
141 kms_flip@dpms-vs-vblank-race,Fail
142 kms_flip@dpms-vs-vblank-race-interruptible,Fail
145 kms_flip@flip-vs-blocking-wf-vblank,Fail
146 kms_flip@flip-vs-expired-vblank,Fail
147 kms_flip@flip-vs-expired-vblank-interruptible,Fail
151 kms_flip@modeset-vs-vblank-race,Fail
152 kms_flip@modeset-vs-vblank-race-interruptible,Fail
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vkms.c57 DRM_WARN("%s: vblank timer overrun\n", __func__); in amdgpu_vkms_vblank_simulate()
60 /* Don't queue timer again when vblank is disabled. */ in amdgpu_vkms_vblank_simulate()
69 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc); in amdgpu_vkms_enable_vblank() local
75 out->period_ns = ktime_set(0, vblank->framedur_ns); in amdgpu_vkms_enable_vblank()
94 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc); in amdgpu_vkms_get_vblank_timestamp() local
97 if (!READ_ONCE(vblank->enabled)) { in amdgpu_vkms_get_vblank_timestamp()
104 if (WARN_ON(*vblank_time == vblank->time)) in amdgpu_vkms_get_vblank_timestamp()
110 * only generated after all the vblank registers are updated) and what in amdgpu_vkms_get_vblank_timestamp()
111 * the vblank core expects. Therefore we need to always correct the in amdgpu_vkms_get_vblank_timestamp()
/linux/drivers/video/fbdev/matrox/
H A Dmatroxfb_crtc2.c403 …ic int matroxfb_dh_get_vblank(const struct matroxfb_dh_fb_info* m2info, struct fb_vblank* vblank) { in matroxfb_dh_get_vblank() argument
407 memset(vblank, 0, sizeof(*vblank)); in matroxfb_dh_get_vblank()
408 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VBLANK; in matroxfb_dh_get_vblank()
410 vblank->vcount = mga_inl(0x3C48) & 0x000007FF; in matroxfb_dh_get_vblank()
412 if (vblank->vcount >= m2info->fbcon.var.yres) in matroxfb_dh_get_vblank()
413 vblank->flags |= FB_VBLANK_VBLANKING; in matroxfb_dh_get_vblank()
415 vblank->flags |= FB_VBLANK_HAVE_COUNT; in matroxfb_dh_get_vblank()
418 vblank->count = minfo->crtc2.vsync.cnt; in matroxfb_dh_get_vblank()
435 struct fb_vblank vblank; in matroxfb_dh_ioctl() local
438 err = matroxfb_dh_get_vblank(m2info, &vblank); in matroxfb_dh_ioctl()
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_crtc.h127 * @event : Pointer to last received drm vblank event. If there is a
128 * pending vblank event, this will be non-null.
133 * @vblank_cb_count : count of vblank callback since last reset
135 * @vblank_cb_time : ktime at vblank count reset
138 * safe to make decisions on during VBLANK on/off work
/linux/drivers/media/i2c/
H A Dimx334.c102 * @vblank: Vertical blanking in lines
113 u32 vblank; member
136 * @vblank: Vertical blanking in lines
158 u32 vblank; member
486 .vblank = 2340,
499 .vblank = 1170,
644 mode->vblank_max, 1, mode->vblank); in imx334_update_controls()
648 return __v4l2_ctrl_s_ctrl(imx334->vblank_ctrl, mode->vblank); in imx334_update_controls()
664 lpfr = imx334->vblank + imx334->cur_mode->height; in imx334_update_exp_gain()
712 imx334->vblank = imx334->vblank_ctrl->val; in imx334_set_ctrl()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_crtc.c106 * @vblank_enabled: indicates whether the DRM vblank counter is currently
111 * The DRM vblank counter enable/disable action is used as the trigger to enable
116 * - vblank counter is disabled
120 * - Keep enabled even when vblank counter gets enabled
124 * - Disable when vblank counter is enabled
259 * Control PSR based on vblank requirements from OS in amdgpu_dm_crtc_vblank_control_worker()
263 * requests vblank events). Fast atomic commits will simply trigger a in amdgpu_dm_crtc_vblank_control_worker()
300 /* vblank irq on -> Only need vupdate irq in vrr mode */ in amdgpu_dm_crtc_set_vblank()
304 /* vblank irq off -> vupdate irq off */ in amdgpu_dm_crtc_set_vblank()
311 /* crtc vblank or vstartup interrupt */ in amdgpu_dm_crtc_set_vblank()

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