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/freebsd/sys/crypto/openssl/aarch64/
H A Dbsaes-armv8.S55 eor v0.16b, v0.16b, v8.16b
56 eor v1.16b, v1.16b, v8.16b
57 eor v2.16b, v2.16b, v8.16b
58 eor v4.16b, v4.16b, v8.16b
59 eor v3.16b, v3.16b, v8.16b
60 eor v5.16b, v5.16b, v8.16b
65 eor v6.16b, v6.16b, v8.16b
66 eor v7.16b, v7.16b, v8.16b
70 ushr v8.2d, v0.2d, #1
74 eor v8.16b, v8.16b, v1.16b
[all …]
H A Daes-gcm-armv8-unroll8_64.S267 .inst 0xce006d08 //eor3 v8.16b, v8.16b, v0.16b, v27.16b //AES block 0 - result
308 rev64 v8.16b, v8.16b //GHASH block 8k
324 eor v8.16b, v8.16b, v19.16b //PRE 1
331 pmull2 v17.1q, v8.2d, v25.2d //GHASH block 8k - high
334 trn1 v18.2d, v9.2d, v8.2d //GHASH block 8k, 8k+1 - mid
335 pmull v19.1q, v8.1d, v25.1d //GHASH block 8k - low
337 trn2 v8.2d, v9.2d, v8.2d //GHASH block 8k, 8k+1 - mid
358 eor v8.16b, v8.16b, v18.16b //GHASH block 8k, 8k+1 - mid
396 pmull2 v18.1q, v8.2d, v24.2d //GHASH block 8k - mid
398 pmull v24.1q, v8.1d, v24.1d //GHASH block 8k+1 - mid
[all …]
H A Dvpaes-armv8.S232 ushr v8.16b, v15.16b, #4
237 tbl v10.16b, {v21.16b}, v8.16b
239 eor v8.16b, v9.16b, v16.16b
241 eor v8.16b, v8.16b, v10.16b
252 tbl v8.16b, {v24.16b}, v11.16b
258 eor v8.16b, v8.16b, v12.16b
263 tbl v11.16b, {v8.16b}, v1.16b
267 tbl v8.16b, {v8.16b}, v4.16b
273 eor v8.16b, v8.16b, v11.16b
276 eor v8.16b, v8.16b, v12.16b
[all …]
H A Daes-gcm-armv8_64.S179 trn1 v8.2d, v12.2d, v13.2d //h2h | h1h
218 eor v16.16b, v16.16b, v8.16b //h2k | h1k
367 eor v8.8b, v8.8b, v4.8b //GHASH block 4k - mid
378 pmull v10.1q, v8.1d, v10.1d //GHASH block 4k - mid
386 pmull2 v8.1q, v6.2d, v13.2d //GHASH block 4k+2 - high
408 eor v9.16b, v9.16b, v8.16b //GHASH block 4k+2 - high
413 movi v8.8b, #0xc2
447 pmull v31.1q, v9.1d, v8.1d //MODULO - top 64b align with mid
534 pmull v9.1q, v10.1d, v8.1d //MODULO - mid 64b align with low
596 eor v8.8b, v8.8b, v4.8b //GHASH block 4k - mid
[all …]
H A Dsm4-armv8.S438 ld1 {v8.4s},[x4]
445 eor v16.16b,v16.16b,v8.16b
513 mov v8.16b,v19.16b
521 eor v8.16b,v8.16b,v16.16b
523 rev32 v8.16b,v8.16b
525 .inst 0xcec08408 //sm4e v8.4s,v0.4s
526 .inst 0xcec08428 //sm4e v8.4s,v1.4s
527 .inst 0xcec08448 //sm4e v8.4s,v2.4s
528 .inst 0xcec08468 //sm4e v8.4s,v3.4s
529 .inst 0xcec08488 //sm4e v8.4s,v4.4s
[all …]
H A Dvpsm4-armv8.S354 eor v8.16b,v8.16b,v13.16b
359 eor v15.16b,v15.16b,v8.16b
419 eor v15.16b,v8.16b,v9.16b
558 rev32 v7.16b,v8.16b
560 mov v7.16b,v8.16b
947 ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x0],#64
961 rev32 v8.16b,v8.16b
1975 ld4 {v8.4s,v9.4s,v10.4s,v11.4s},[x10]
1989 rev32 v8.16b,v8.16b
2001 zip1 v8.4s,v0.4s,v1.4s
[all …]
H A Darmv8-mont.S249 eor v8.16b,v8.16b,v8.16b
263 st1 {v8.2d,v9.2d},[x7],#32
284 umlal v8.2d,v28.2s,v0.s[2]
300 umlal v8.2d,v29.2s,v2.s[2]
315 umlal v8.2d,v28.2s,v0.s[1]
330 umlal v8.2d,v29.2s,v2.s[1]
342 add v16.2d,v8.2d,v7.2d
343 ins v8.d[0],v16.d[0]
345 umlal v8.2d,v28.2s,v0.s[0]
349 shl v29.2d,v8.2d,#16
[all …]
/freebsd/crypto/openssl/crypto/aes/asm/
H A Dbsaes-armv8.pl88 eor v0.16b, v0.16b, v8.16b
89 eor v1.16b, v1.16b, v8.16b
90 eor v2.16b, v2.16b, v8.16b
91 eor v4.16b, v4.16b, v8.16b
92 eor v3.16b, v3.16b, v8.16b
93 eor v5.16b, v5.16b, v8.16b
98 eor v6.16b, v6.16b, v8.16b
99 eor v7.16b, v7.16b, v8.16b
103 ushr v8.2d, v0.2d, #1
107 eor v8.16b, v8.16b, v1.16b
[all …]
H A Dvpaes-armv8.pl295 ushr v8.16b, v15.16b, #4
300 tbl v10.16b, {$ipthi}, v8.16b
302 eor v8.16b, v9.16b, v16.16b
304 eor v8.16b, v8.16b, v10.16b
315 tbl v8.16b, {$sb1u}, v11.16b
321 eor v8.16b, v8.16b, v12.16b
326 tbl v11.16b, {v8.16b}, v1.16b
330 tbl v8.16b, {v8.16b}, v4.16b
336 eor v8.16b, v8.16b, v11.16b
339 eor v8.16b, v8.16b, v12.16b
[all …]
/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DARMTargetParserCommon.cpp31 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a") in getArchSynonym()
32 .Case("v8.1a", "v8.1-a") in getArchSynonym()
33 .Case("v8.2a", "v8.2-a") in getArchSynonym()
34 .Case("v8.3a", "v8.3-a") in getArchSynonym()
35 .Case("v8.4a", "v8.4-a") in getArchSynonym()
36 .Case("v8.5a", "v8.5-a") in getArchSynonym()
37 .Case("v8.6a", "v8.6-a") in getArchSynonym()
38 .Case("v8.7a", "v8.7-a") in getArchSynonym()
39 .Case("v8.8a", "v8.8-a") in getArchSynonym()
40 .Case("v8.9a", "v8.9-a") in getArchSynonym()
[all …]
/freebsd/crypto/openssl/crypto/sm3/asm/
H A Dsm3-riscv64-zvksh.pl68 $V8, $V9, $V10, $V11, $V12, $V13, $V14, $V15,
94 @{[vle32_v $V8, $INPUT]} # v8 := {w15, ..., w8}
109 @{[vslideup_vi $V4, $V8, 4]} # v4 := {w11, w10, w9, w8, w7, w6, w5, w4}
115 @{[vsm3c_vi $V0, $V8, 4]}
116 @{[vslidedown_vi $V4, $V8, 2]} # v4 := {X, X, w15, w14, w13, w12, w11, w10}
119 @{[vsm3me_vv $V6, $V8, $V6]} # v6 := {w23, w22, w21, w20, w19, w18, w17, w16}
133 @{[vsm3me_vv $V8, $V6, $V8]} # v8 := {w31, w30, w29, w28, w27, w26, w25, w24}
137 @{[vslideup_vi $V4, $V8, 4]} # v4 := {w27, w26, w25, w24, w23, w22, w21, w20}
143 @{[vsm3c_vi $V0, $V8, 12]}
144 @{[vslidedown_vi $V4, $V8, 2]} # v4 := {x, X, w31, w30, w29, w28, w27, w26}
[all …]
/freebsd/sys/netgraph/
H A Dng_patch.c240 conf->ops[i].val.v8 = conf->ops[i].val.v1; in ng_patch_rcvmsg()
243 conf->ops[i].val.v8 = conf->ops[i].val.v2; in ng_patch_rcvmsg()
246 conf->ops[i].val.v8 = conf->ops[i].val.v4; in ng_patch_rcvmsg()
266 conf->ops[i].val.v1 = (uint8_t) conf->ops[i].val.v8; in ng_patch_rcvmsg()
269 conf->ops[i].val.v2 = (uint16_t) conf->ops[i].val.v8; in ng_patch_rcvmsg()
272 conf->ops[i].val.v4 = (uint32_t) conf->ops[i].val.v8; in ng_patch_rcvmsg()
496 val.v8 = be64toh(val.v8); in do_patch()
501 val.v8 = privp->conf->ops[i].val.v8; in do_patch()
504 val.v8 += privp->conf->ops[i].val.v8; in do_patch()
507 val.v8 -= privp->conf->ops[i].val.v8; in do_patch()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dnvidia,tegra20-sdhci.txt52 configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
56 - pinctrl-names : "sdmmc-3v3-drv" and "sdmmc-1v8-drv" are applicable for
59 using pads at 3V3 and 1V8 levels.
65 - nvidia,pad-autocal-pull-up-offset-1v8,
66 nvidia,pad-autocal-pull-down-offset-1v8 : Specify drive strength
72 - nvidia,pad-autocal-pull-up-offset-1v8-timeout,
73 nvidia,pad-autocal-pull-down-offset-1v8-timeout : Specify drive
116 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
121 nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
122 nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
[all …]
H A Dnvidia,tegra20-sdhci.yaml112 nvidia,pad-autocal-pull-down-offset-1v8:
117 nvidia,pad-autocal-pull-down-offset-1v8-timeout:
140 nvidia,pad-autocal-pull-up-offset-1v8:
145 nvidia,pad-autocal-pull-up-offset-1v8-timeout:
230 - const: sdmmc-1v8
234 - const: sdmmc-1v8-drv
239 - const: sdmmc-1v8-drv
242 - const: sdmmc-1v8-drv
259 - const: sdmmc-1v8
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFeatures.td37 // 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
150 // True if the subtarget supports v8 atomics (LDA/LDAEX etc) instructions.
153 "Has v8 acquire/release (lda/ldaex "
507 "Enable v8.5a Speculation Barrier" >;
639 def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true",
640 "Support ARM v8 instructions",
643 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
644 "Support ARM v8.1a instructions",
647 def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
648 "Support ARM v8.2a instructions",
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcoresight-cti.yaml32 are implementation defined, except when the CTI is connected to an ARM v8
35 In this case the ARM v8 architecture defines the required signal connections
36 between CTI and the CPU core and ETM if present. In the case of a v8
38 indicate this feature (arm,coresight-cti-v8-arch).
88 - const: arm,coresight-cti-v8-arch
99 base cti node if compatible string arm,coresight-cti-v8-arch is used,
115 compatible string arm,coresight-cti-v8-arch used. If the associated
217 const: arm,coresight-cti-v8-arch
235 # v8 architecturally defined CTI - CPU + ETM connections generated by the
236 # driver according to the v8 architecture specification.
[all …]
H A Darm,coresight-cti.yaml31 are implementation defined, except when the CTI is connected to an ARM v8
34 In this case the ARM v8 architecture defines the required signal connections
35 between CTI and the CPU core and ETM if present. In the case of a v8
37 indicate this feature (arm,coresight-cti-v8-arch).
87 - const: arm,coresight-cti-v8-arch
114 arm,coresight-cti-v8-arch used. If the associated device has not been
233 const: arm,coresight-cti-v8-arch
251 # v8 architecturally defined CTI - CPU + ETM connections generated by the
252 # driver according to the v8 architecture specification.
255 compatible = "arm,coresight-cti-v8
[all...]
/freebsd/contrib/file/magic/Magdir/
H A Djavascript71 # v8 JavaScript engine bytecode
73 # URL: https://v8.dev/docs/ignition
75 # V8 bytecode extraction was added in NodeJS v5.7.0 (V8 4.6.85.31).
76 # Version information is provided for some v8 versions found in NodeJS releases.
83 >>>>0 ulelong^0xC0DE0000 x v8 bytecode, external reference table size: %u bytes,
95 >>>>0 ulelong^0xC0DE0000 x v8 bytecode, external reference table size: %u bytes,
116 >>>>0 ulelong^0xC0DE0000 x v8 bytecode, external reference table size: %u bytes,
134 >>>>0 ulelong^0xC0DE0000 x v8 bytecode, external reference table size: %u bytes,
148 >>>0 ulelong^0xC0DE0000 x v8 bytecode, external reference table size: %u bytes,
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp382 // vwaddu.vv v10, v8, v9 in getShuffleCost()
391 // vnsrl.wi v10, v8, 0 in getShuffleCost()
501 // vslidedown.vi v8, v9, 2 in getShuffleCost()
507 // vslideup.vi v8, v9, 2 in getShuffleCost()
515 // vmerge.vvm v8, v9, v8, v0 in getShuffleCost()
532 // vmv.v.x v8, a0 in getShuffleCost()
533 // vmsne.vi v0, v8, 0 in getShuffleCost()
540 // vmv.v.i v8, 0 in getShuffleCost()
541 // vmerge.vim v8, v8, 1, v0 in getShuffleCost()
542 // vmv.x.s a0, v8 in getShuffleCost()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dfixed-regulator.yaml125 reg_1v8: regulator-1v8 {
127 regulator-name = "1v8";
137 reg_1v8_clk: regulator-1v8-clk {
139 regulator-name = "1v8";
148 reg_1v8_domain: regulator-1v8-domain {
150 regulator-name = "1v8";
/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Dfoundation-v8-psci.dts7 #include "foundation-v8.dtsi"
8 #include "foundation-v8-gicv2.dtsi"
9 #include "foundation-v8-psci.dtsi"
H A Dfoundation-v8-gicv3-psci.dts7 #include "foundation-v8.dtsi"
8 #include "foundation-v8-gicv3.dtsi"
9 #include "foundation-v8-psci.dtsi"
H A Dfoundation-v8-gicv3.dts8 #include "foundation-v8.dtsi"
9 #include "foundation-v8-gicv3.dtsi"
10 #include "foundation-v8-spin-table.dtsi"
H A Dfoundation-v8.dts8 #include "foundation-v8.dtsi"
9 #include "foundation-v8-gicv2.dtsi"
10 #include "foundation-v8-spin-table.dtsi"
/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhi6220-coresight.dtsi380 compatible = "arm,coresight-cti-v8-arch",
393 compatible = "arm,coresight-cti-v8-arch",
406 compatible = "arm,coresight-cti-v8-arch",
419 compatible = "arm,coresight-cti-v8-arch",
432 compatible = "arm,coresight-cti-v8-arch",
445 compatible = "arm,coresight-cti-v8-arch",
458 compatible = "arm,coresight-cti-v8-arch",
471 compatible = "arm,coresight-cti-v8-arch",

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