/linux/drivers/input/rmi4/ |
H A D | rmi_f34v7.c | 37 f34->v7.in_bl_mode = status >> 7; in rmi_f34v7_read_flash_status() 38 f34->v7.flash_status = status & 0x1f; in rmi_f34v7_read_flash_status() 40 if (f34->v7.flash_status != 0x00) { in rmi_f34v7_read_flash_status() 42 __func__, f34->v7.flash_status, f34->v7.command); in rmi_f34v7_read_flash_status() 55 f34->v7.command = command; in rmi_f34v7_read_flash_status() 66 if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { in rmi_f34v7_wait_for_idle() 87 if (f34->v7.flash_status != 0x00) in rmi_f34v7_check_command_status() 192 f34->v7.command = command; in rmi_f34v7_write_command() 241 if (f34->v7.config_area == v7_UI_CONFIG_AREA) in rmi_f34v7_write_partition_id() 243 else if (f34->v7.config_area == v7_DP_CONFIG_AREA) in rmi_f34v7_write_partition_id() [all …]
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H A D | rmi_f34.h | 34 /* F34 V7 defines */ 54 /* F34 V7 commands */ 84 /* F34 V7 partition IDs */ 96 /* F34 V7 container IDs */ 287 struct f34v7_data v7; member
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/linux/drivers/media/platform/samsung/s5p-mfc/ |
H A D | s5p_mfc_opr.h | 42 void __iomem *dis_shared_mem_addr;/* only v7 */ 64 void __iomem *d_min_num_dis;/* only v7 */ 65 void __iomem *d_min_first_dis_size;/* only v7 */ 66 void __iomem *d_min_second_dis_size;/* only v7 */ 67 void __iomem *d_min_third_dis_size;/* only v7 */ 68 void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */ 69 void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */ 70 void __iomem *d_post_filter_luma_dpb2;/* only v7 */ 71 void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */ 72 void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */ [all …]
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H A D | regs-mfc-v7.h | 3 * Register definition file for Samsung MFC V7.x Interface (FIMV) driver 14 /* Additional features of v7 */ 17 /* Additional registers for v7 */
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/linux/arch/arm64/lib/ |
H A D | crc-t10dif-core.S | 230 CPU_LE( rev64 v7.16b, v7.16b ) 238 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 ) 252 // While >= 128 data bytes remain (not counting v0-v7), fold the 128 253 // bytes v0-v7 into them, storing the result back into v0-v7. 258 fold_32_bytes \p, v6, v7 263 // Now fold the 112 bytes in v0-v6 into the 16 bytes in v7. 271 fold_16_bytes \p, v3, v7, 1 274 fold_16_bytes \p, v5, v7, 1 276 fold_16_bytes \p, v6, v7 279 // (not counting v7), following the previous extra subtraction by 128. [all …]
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/linux/arch/arm64/crypto/ |
H A D | aes-neonbs-core.S | 385 ld1 {v7.4s}, [x1], #16 // load round 0 key 402 tbl v7.16b ,{v17.16b}, v16.16b 405 cmtst v0.16b, v7.16b, v8.16b 406 cmtst v1.16b, v7.16b, v9.16b 407 cmtst v2.16b, v7.16b, v10.16b 408 cmtst v3.16b, v7.16b, v11.16b 409 cmtst v4.16b, v7.16b, v12.16b 410 cmtst v5.16b, v7.16b, v13.16b 411 cmtst v6.16b, v7.16b, v14.16b 412 cmtst v7.16b, v7.16b, v15.16b [all …]
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H A D | sm4-neon-core.S | 274 ld4 {v4.4s-v7.4s}, [x2], #64 276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7) 279 st1 {v4.16b-v7.16b}, [x1], #64 341 ld4 {v4.4s-v7.4s}, [x2] 343 SM4_CRYPT_BLK8_norotate(v0, v1, v2, v3, v4, v5, v6, v7) 347 rotate_clockwise_4x4(v4, v5, v6, v7) 362 eor v7.16b, v7.16b, RTMP6.16b 367 st1 {v4.16b-v7.16b}, [x1], #64 384 rev32 v7.16b, v3.16b 386 transpose_4x4(v4, v5, v6, v7) [all …]
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H A D | sm4-ce-core.S | 68 sm4ekey v7.4s, v6.4s, v31.4s; 74 st1 {v4.16b-v7.16b}, [x1]; 76 tbl v16.16b, {v7.16b}, v24.16b 122 ld1 {v4.16b-v7.16b}, [x2], #64; 124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7); 127 st1 {v4.16b-v7.16b}, [x1], #64; 231 ld1 {v4.16b-v7.16b}, [x2], #64 240 rev32 v15.16b, v7.16b 256 mov RIV.16b, v7.16b 439 inc_le128(v7) /* +7 */ [all …]
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H A D | aes-ce-ccm-core.S | 93 ld1 {v7.16b-v8.16b}, [x9] 97 tbl v1.16b, {v1.16b}, v7.16b /* move keystream to end of register */ 98 eor v7.16b, v2.16b, v1.16b /* encrypt partial input block */ 99 bif v2.16b, v7.16b, v22.16b /* select plaintext */ 100 tbx v7.16b, {v6.16b}, v8.16b /* insert output from previous iteration */ 104 st1 {v7.16b}, [x0] /* store output block */
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H A D | sha3-ce-core.S | 47 ld1 { v4.1d- v7.1d}, [x8], #32 73 eor v7.8b, v7.8b, v25.8b 104 eor v7.8b, v7.8b, v25.8b 113 eor3 v27.16b, v2.16b, v7.16b, v12.16b 149 xar v26.2d, v7.2d, v26.2d, (64 - 6) 172 bcax v7.16b, v30.16b, v9.16b, v4.16b 192 st1 { v4.1d- v7.1d}, [x0], #32
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H A D | aes-modes.S | 193 mov v7.16b, v2.16b 201 eor v3.16b, v3.16b, v7.16b 457 ld1 {v5.16b-v7.16b}, [IN], #48 464 eor v2.16b, v7.16b, v2.16b 510 ld1 {v7.16b}, [IN], x16 520 ST4( eor v7.16b, v7.16b, v1.16b ) 528 ST5( eor v7.16b, v7.16b, v2.16b ) 534 st1 {v7.16b}, [OUT], x16 665 next_tweak v7, v6, v8 666 eor v3.16b, v3.16b, v7.16b [all …]
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H A D | sm4-ce-cipher-core.S | 22 ld1 {v4.4s-v7.4s}, [x0] 30 sm4e v8.4s, v7.4s
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/linux/lib/raid6/ |
H A D | rvv.c | 217 * v4:wp1, v5:wq1, v6:wd1/w21, v7:w11 in raid6_rvv2_gen_syndrome_real() 254 "vsll.vi v7, v5, 1\n" in raid6_rvv2_gen_syndrome_real() 256 "vxor.vv v7, v7, v6\n" in raid6_rvv2_gen_syndrome_real() 258 "vxor.vv v5, v7, v6\n" in raid6_rvv2_gen_syndrome_real() 309 * v4:wp1, v5:wq1, v6:wd1/w21, v7:w11 in raid6_rvv2_xor_syndrome_real() 347 "vsll.vi v7, v5, 1\n" in raid6_rvv2_xor_syndrome_real() 349 "vxor.vv v7, v7, v6\n" in raid6_rvv2_xor_syndrome_real() 351 "vxor.vv v5, v7, v6\n" in raid6_rvv2_xor_syndrome_real() 377 "vsll.vi v7, v5, 1\n" in raid6_rvv2_xor_syndrome_real() 379 "vxor.vv v5, v7, v6\n" in raid6_rvv2_xor_syndrome_real() [all …]
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/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-3720-espressobin-v7-emmc.dts | 3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board V7 with eMMC 19 model = "Globalscale Marvell ESPRESSOBin Board V7 (eMMC)"; 20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
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H A D | armada-3720-espressobin-v7.dts | 3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board V7 19 model = "Globalscale Marvell ESPRESSOBin Board V7"; 20 compatible = "globalscale,espressobin-v7", "globalscale,espressobin",
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/linux/Documentation/devicetree/bindings/arm/marvell/ |
H A D | armada-37xx.yaml | 34 - globalscale,espressobin-v7 39 - description: Globalscale Espressobin V7 boards 42 - globalscale,espressobin-v7-emmc 43 - const: globalscale,espressobin-v7
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/linux/Documentation/devicetree/bindings/mtd/ |
H A D | brcm,brcmnand.yaml | 53 - brcm,brcmnand-v7.0 54 - brcm,brcmnand-v7.1 55 - brcm,brcmnand-v7.2 56 - brcm,brcmnand-v7.3 62 - brcm,brcmnand-v7.0 63 - brcm,brcmnand-v7.1 112 v7.0. Use this property to describe the rare 231 compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";
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/linux/arch/arm/mm/ |
H A D | cache-tauros2.c | 29 * When Tauros2 is used on a CPU that supports the v7 hierarchical 30 * cache operations, the cache handling code in proc-v7.S takes care 34 * being used on a pre-v7 CPU, and we only need to build support for 36 * configured to support a pre-v7 CPU. 236 * Check whether this CPU has support for the v7 hierarchical in tauros2_internal_init() 237 * cache ops. (PJ4 is in its v7 personality mode if the MMFR3 in tauros2_internal_init() 238 * register indicates support for the v7 hierarchical cache in tauros2_internal_init() 242 * implement the v7 cache ops but are only ARMv6 CPUs (due to in tauros2_internal_init()
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/linux/drivers/net/wireless/realtek/rtw89/ |
H A D | coex.h | 341 btc->dm.slot.v7[sid].dur = dura; in _slot_set_le() 342 btc->dm.slot.v7[sid].cxtype = type; in _slot_set_le() 343 btc->dm.slot.v7[sid].cxtbl = tbl; in _slot_set_le() 359 btc->dm.slot.v7[sid].dur = cpu_to_le16(dura); in _slot_set_dur() 368 btc->dm.slot.v7[sid].cxtype = cpu_to_le16(type); in _slot_set_type() 377 btc->dm.slot.v7[sid].cxtbl = cpu_to_le32(tbl); in _slot_set_tbl()
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H A D | coex.c | 331 struct rtw89_btc_fbtc_slot_v7 v7[CXST_MAX]; member 349 struct rtw89_btc_btf_set_mon_reg_v7 v7; member 879 btc->dm.slot.v7[i].dur = s_def[i].dur; in _reset_btc_var() 880 btc->dm.slot.v7[i].cxtype = s_def[i].cxtype; in _reset_btc_var() 881 btc->dm.slot.v7[i].cxtbl = s_def[i].cxtbl; in _reset_btc_var() 883 memcpy(&btc->dm.slot_now.v7, &btc->dm.slot.v7, in _reset_btc_var() 884 sizeof(btc->dm.slot_now.v7)); in _reset_btc_var() 1212 pver->v7 = *(struct rtw89_btc_fbtc_btver_v7 *)pfinfo; in _update_bt_report() 1213 bt->ver_info.fw = le32_to_cpu(pver->v7.fw_ver); in _update_bt_report() 1214 bt->ver_info.fw_coex = le32_get_bits(pver->v7.coex_ver, in _update_bt_report() [all …]
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/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-qmp.h | 30 #include "phy-qcom-qmp-qserdes-com-v7.h" 31 #include "phy-qcom-qmp-qserdes-txrx-v7.h" 53 #include "phy-qcom-qmp-pcs-v7.h"
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | atombios_crtc.c | 464 PIXEL_CLOCK_PARAMETERS_V7 v7; member 706 args.v7.ulPixelClock = cpu_to_le32(clock * 10); /* 100 hz units */ in amdgpu_atombios_crtc_program_pll() 707 args.v7.ucMiscInfo = 0; in amdgpu_atombios_crtc_program_pll() 710 args.v7.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN; in amdgpu_atombios_crtc_program_pll() 711 args.v7.ucCRTC = crtc_id; in amdgpu_atombios_crtc_program_pll() 716 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS; in amdgpu_atombios_crtc_program_pll() 719 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4; in amdgpu_atombios_crtc_program_pll() 722 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2; in amdgpu_atombios_crtc_program_pll() 725 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1; in amdgpu_atombios_crtc_program_pll() 729 args.v7.ucTransmitterID = encoder_id; in amdgpu_atombios_crtc_program_pll() [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | samsung,s5p-mfc.yaml | 24 - samsung,mfc-v7 # Exynos5420 31 - const: samsung,mfc-v7 # Fall back for Exynos3250 155 - samsung,mfc-v7
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/linux/lib/ |
H A D | test_dynamic_debug.c | 85 enum cat_level_num { V0 = 14, V1, V2, V3, V4, V5, V6, V7 }; enumerator 87 "V0", "V1", "V2", "V3", "V4", "V5", "V6", "V7"); 131 prdbg(V7); in do_levels()
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/linux/drivers/char/mwave/ |
H A D | mwavedd.h | 109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ argument 111 printk(s,v1,v2,v3,v4,v5,v6,v7); \ 122 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) argument
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