| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | adi,adp5055-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/adi,adp5055-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexis Czezar Torreno <alexisczezar.torreno@analog.com> 14 direct connection to high input voltages up to 18 V with no preregulators. 15 https://www.analog.com/media/en/technical-documentation/data-sheets/adp5055.pdf 20 - adi,adp5055 24 - 0x70 25 - 0x71 [all …]
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| /linux/Documentation/fb/ |
| H A D | modedb.rst | 9 - one routine to probe for video modes, which can be used by all frame buffer 11 - one generic video mode database with a fair amount of standard videomodes 13 - the possibility to supply your own mode database for graphics hardware that 14 needs non-standard modes, like amifb and Mac frame buffer drivers (which 23 <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 24 <name>[-<bpp>][@<refresh>] 31 - NSTC: 480i output, with the CCIR System-M TV mode and NTSC color encoding 32 - NTSC-J: 480i output, with the CCIR System-M TV mode, the NTSC color 33 encoding, and a black level equal to the blanking level. 34 - PAL: 576i output, with the CCIR System-B TV mode and PAL color encoding [all …]
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| /linux/drivers/media/i2c/ |
| H A D | ths8200.c | 2 * ths8200 - Texas Instruments THS8200 video encoder driver 23 #include <linux/v4l2-dv-timings.h> 25 #include <media/v4l2-dv-timings.h> 26 #include <media/v4l2-async.h> 27 #include <media/v4l2-device.h> 33 MODULE_PARM_DESC(debug, "debug level (0-2)"); 93 /* To set specific bits in the register, a clear-mask is given (to be AND-ed), 94 * and then the value-mask (to be OR-ed). 108 reg->val = ths8200_read(sd, reg->reg & 0xff); in ths8200_g_register() 109 reg->size = 1; in ths8200_g_register() [all …]
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| H A D | tda1997x_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 /* Page 0x00 - General Control */ 130 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */ 131 #define DETECT_5V_B BIT(1) /* 5V present on input B */ 132 #define DETECT_5V_A BIT(0) /* 5V present on input A */ 158 #define HPD_MAN_CTRL_5VEN BIT(2) /* Output 5V */ 165 #define RT_MAN_CTRL_RT_B BIT(1) /* enable TMDS pull-up on Input B */ 166 #define RT_MAN_CTRL_RT_A BIT(0) /* enable TMDS pull-up on Input A */ 212 #define PCLK_DELAY_SHIFT 4 /* Pixel delay (-8..+7) */ 227 /* Page 0x01 - HDMI info and packets */ [all …]
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| /linux/include/drm/ |
| H A D | drm_modes.h | 3 * Copyright © 2007-2008 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 46 * enum drm_mode_status - hardware support status of a mode 70 * @MODE_HBLANK_NARROW: horizontal blanking too narrow 71 * @MODE_HBLANK_WIDE: horizontal blanking too wide 74 * @MODE_VBLANK_NARROW: vertical blanking too narrow 75 * @MODE_VBLANK_WIDE: vertical blanking too wide 81 * @MODE_NO_REDUCED: monitor doesn't accept reduced blanking 129 MODE_STALE = -3, 130 MODE_BAD = -2, [all …]
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| /linux/drivers/gpu/drm/ |
| H A D | drm_modes.c | 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 4 * Copyright © 2007-2008 Intel Corporation 6 * Copyright 2005-2006 Luc Verhaegen 53 * drm_mode_debug_printmodeline - print a mode to dmesg 65 * drm_mode_create - create a new display mode 87 * drm_mode_destroy - remove a mode 103 * drm_mode_probed_add - add a mode to a connector's probed_mode list 114 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); in drm_mode_probed_add() 116 list_add_tail(&mode->head, &connector->probed_modes); in drm_mode_probed_add() 127 * - https://web.archive.org/web/20220406232708/http://www.kolumbus.fi/pami1/video/pal_ntsc.html [all …]
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| H A D | drm_vblank.c | 54 * scanlines is referred to as the vertical blanking region, or vblank for 57 * For historical reference, the vertical blanking period was designed to 60 * blanking periods. They were designed to give the electron gun enough 85 * blanking ┆xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx┆ 91 * "Physical top of display" is the reference point for the high-precision/ 95 * vertical blanking period so that settings like gamma, the image buffer 108 * Vertical blanking plays a major role in graphics rendering. To achieve 109 * tear-free display, users must synchronize page flips and/or rendering to 110 * vertical blanking. The DRM API offers ioctls to perform page flips 111 * synchronized to vertical blanking and wait for vertical blanking. [all …]
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| /linux/drivers/staging/fbtft/ |
| H A D | fb_st7789v.c | 1 // SPDX-License-Identifier: GPL-2.0+ 34 * enum st7789v_command - ST7789V display controller commands 86 * init_tearing_effect_line() - init tearing effect line. 93 struct device *dev = par->info->device; in init_tearing_effect_line() 130 * init_display() - initialize the display controller 147 par->fbtftops.reset(par); in init_display() 157 /* set pixel format to RGB-565 */ in init_display() 166 * VGH = 13.26V in init_display() 167 * VGL = -10.43V in init_display() 181 * VAP = 4.1V + (VCOM + VCOM offset + 0.5 * VDV) in init_display() [all …]
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| /linux/drivers/gpu/drm/armada/ |
| H A D | armada_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 36 * This is how it is defined by CEA-861-D - line and pixel numbers are 45 * 22 blanking lines. VSYNC at 1320 (referenced to the HSYNC rising edge). 51 * 23 blanking lines 57 * Odd frame, 563 total lines, VSYNC at line 543-548, pixel 1128. 58 * Even frame, 562 total lines, VSYNC at line 542-547, pixel 2448. 62 * vtotal = mode->crtc_vtotal + 1; 63 * vbackporch = mode->crtc_vsync_start - mode->crtc_vdisplay + 1; 64 * vhorizpos = mode->crtc_hsync_start - mode->crtc_htotal / 2 66 * vtotal = mode->crtc_vtotal; [all …]
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_tv_regs.h | 1 /* SPDX-License-Identifier: MIT */ 41 /* Sets the colorburst to PAL mode. Required for non-M PAL modes. */ 56 /* Read-only state that reports all features enabled */ 58 /* Read-only state that reports that Macrovision is disabled in hardware*/ 60 /* Read-only state that reports that TV-out is disabled in hardware. */ 64 /* Encoder test pattern 1 - combo pattern */ 66 /* Encoder test pattern 2 - full screen vertical 75% color bars */ 68 /* Encoder test pattern 3 - full screen horizontal 75% color bars */ 70 /* Encoder test pattern 4 - random noise */ 72 /* Encoder test pattern 5 - linear color ramps */ [all …]
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| /linux/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | nvreg.h | 3 * Copyright 1996-1997 David J. McKay 24 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nvreg.h,v 1.6 2002/01/25 21:56:06 tsi Exp $ … 192 # define NV_CIO_CR_HBS_INDEX 0x02 /* horizontal blanking start */ 193 # define NV_CIO_CR_HBE_INDEX 0x03 /* horizontal blanking end */ 246 # define NV_CIO_CR_ARX_INDEX 0x26 /* attribute index -- ro copy of 0x60.3c0 */ 289 # define NV_CIO_CRE_4B 0x4b /* given patterns in 0x[2-3][a-c] regs, probably scratch 6 */ 295 # define NV_CIO_CRE_59 0x59 /* related to on/off-chip-ness of digital outputs */
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| /linux/drivers/media/usb/gspca/ |
| H A D | sq930x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2010 Jean-François Moine <http://moinejf.free.fr> 6 * Copyright (C) 2006 -2008 Gerard Klaver <gerard at gkall dot hobby dot nl> 16 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>\n" 199 {0x30, 0x0040}, /* reserved - def 0x0005 */ 200 {0x31, 0x0000}, /* reserved - def 0x002a */ 201 {0x34, 0x0100}, /* reserved - def 0x0100 */ 202 {0x3d, 0x068f}, /* reserved - def 0x068f */ 224 {0x62, 0x041d}, /* reserved - def 0x0418 */ 227 {0x05, 0x007b}, /* horiz blanking */ [all …]
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| H A D | spca561.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 7 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr> 151 {0x0000, 0x8603}, /* Non-automatic optical black level */ 161 /* from ms-win */ 166 /* from ms-win */ 187 {0x0005, 0x002f}, /* blanking control column */ 188 {0x0006, 0x0000}, /* blanking mode row*/ 223 {0x00, 0x8102}, /* white balance - new */ 244 {0x07, 0x8601}, /* white balance - new */ 245 {0x07, 0x8602}, /* white balance - new */ [all …]
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| /linux/drivers/video/fbdev/ |
| H A D | pm2fb.c | 8 * Copyright (c) 1998-2000 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) 14 * I have a Creative Graphics Blaster Exxtreme card - pm2fb on x86. I 16 * hopefully other big-endian) devices now work, thanks to a lot of 71 * support on TVP4010 and similar where there is no RAMDAC - see 74 * fixed-frequency monitor which absolutely has to have -ve sync. So 76 * should be silently turned in -ve sync. 92 u32 video; /* video flags before blanking */ 128 .height = -1, 129 .width = -1, 147 return fb_readl(p->v_regs + off); in pm2_RD() [all …]
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| H A D | pm3fb.c | 2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device 10 * Sven Luther, <luther@dpt-info.u-strasbg.fr> 16 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) 70 u32 video; /* video flags before blanking */ 97 return fb_readl(par->v_regs + off); in PM3_READ_REG() 100 static inline void PM3_WRITE_REG(struct pm3_par *par, s32 off, u32 v) in PM3_WRITE_REG() argument 102 fb_writel(v, par->v_regs + off); in PM3_WRITE_REG() 111 static inline void PM3_WRITE_DAC_REG(struct pm3_par *par, unsigned r, u8 v) in PM3_WRITE_DAC_REG() argument 117 PM3_WRITE_REG(par, PM3RD_IndexedData, v); in PM3_WRITE_DAC_REG() 161 ? reqclock - freq in pm3fb_calculate_clock() [all …]
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| H A D | skeletonfb.c | 2 * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device 61 * Even less warranty that it actually works :-) 107 * This allows when one display changes it video resolution (info->var) 136 * xxxfb_open - Optional function. Called when the framebuffer is 155 * xxxfb_release - Optional function. Called when the framebuffer 174 * xxxfb_check_var - Optional function. Validates a var passed in. 191 * function must return -EINVAL. 196 * a copy of the currently working var (info->var). Better is to not 204 * contents of info->var must be left untouched at all times after 216 * xxxfb_set_par - Optional function. Alters the hardware state. [all …]
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| H A D | acornfb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 1998-2001 Russell King 14 * - Blanking 8bpp displays with VIDC 26 #include <linux/dma-mapping.h> 32 #include <asm/mach-types.h> 68 }, { /* Hi-res mono */ 114 struct fb_var_screeninfo *var = &info->var; in acornfb_set_timing() 122 vidc.h_sync_width = var->hsync_len - 8; in acornfb_set_timing() 123 vidc.h_border_start = vidc.h_sync_width + var->left_margin + 8 - 12; in acornfb_set_timing() 124 vidc.h_display_start = vidc.h_border_start + 12 - 18; in acornfb_set_timing() [all …]
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| H A D | amifb.c | 2 * linux/drivers/video/amifb.c -- Amiga builtin chipset frame buffer device 4 * Copyright (C) 1995-2003 Geert Uytterhoeven 30 * - 24 Jul 96: Copper generates now vblank interrupt and 32 * - 14 Jul 96: Rework and hopefully last ECS bugs fixed 33 * - 7 Mar 96: Hardware sprite support by Roman Zippel 34 * - 18 Feb 96: OCS and ECS support by Roman Zippel 36 * - 2 Dec 95: AGA version by Geert Uytterhoeven 107 --------------------- 111 +----------+---------------------------------------------+----------+-------+ 114 | | v | | | [all …]
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| /linux/drivers/video/fbdev/mmp/hw/ |
| H A D | mmp_ctrl.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 16 /* ------------< LCD register >------------ */ 23 /* 32 bit TV Video Frame0 V Starting Address */ 31 /* 32 bit TV Video Frame1 V Starting Address Register*/ 54 u32 v_pitch_uv; /* Video U and V Line Length (Pitch) */ 112 /* 32 bit TV Video V Color Key Control*/ 116 u32 v_colorkey_v; /* Video V Color Key Control */ 150 #define LCD_SCLK(path) ((PATH_PN == path->id) ? LCD_CFG_SCLK_DIV :\ 151 ((PATH_TV == path->id) ? LCD_TCLK_DIV : LCD_PN2_SCLK_DIV)) 194 #define SPU_DMA_PITCH_V(v) ((v)<<16) argument [all …]
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| /linux/drivers/video/fbdev/aty/ |
| H A D | radeon_base.c | 38 * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR 263 static int default_dynclk = -2; 283 if (rinfo->no_schedule || oops_in_progress) in _radeon_msleep() 291 /* Called if (rinfo->errata & CHIP_ERRATA_PLL_DUMMYREADS) is set */ in radeon_pll_errata_after_index_slow() 298 if (rinfo->errata & CHIP_ERRATA_PLL_DELAY) { in radeon_pll_errata_after_data_slow() 302 if (rinfo->errata & CHIP_ERRATA_R300_CG) { in radeon_pll_errata_after_data_slow() 317 spin_lock_irqsave(&rinfo->reg_lock, flags); in _OUTREGP() 322 spin_unlock_irqrestore(&rinfo->reg_lock, flags); in _OUTREGP() 410 if (!rinfo->bios_seg) in radeon_unmap_ROM() 412 pci_unmap_rom(dev, rinfo->bios_seg); in radeon_unmap_ROM() [all …]
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| /linux/drivers/net/ethernet/sun/ |
| H A D | cassini.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* $Id: cassini.h,v 1.16 2004/08/17 21:15:16 zaumen Exp $ 29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as 30 * 32-bit words. there is no i/o port access. REG_ addresses are 62 /* top level interrupts [0-9] are auto-cleared to 0 when the status 63 * register is read. second level interrupts [13 - 18] are cleared at 64 * the source. tx completion register 3 is replicated in [19 - 31] 84 intr blanking. */ 104 len of non-reassembly pkt 183 #define BIM_CFG_64BIT_DISABLE 0x004 /* disable 64-bit mode */ [all …]
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| H A D | sungem.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* $Id: sungem.h,v 1.10.2.4 2002/03/11 08:54:48 davem Exp $ 39 * This auto-clearing does not occur when the alias at GREG_STAT2 69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level 130 * This 13-bit register is programmed by the driver to hold the descriptor 136 * This 13-bit register is updated by GEM to hold to descriptor entry index 171 * them later. -DaveM 209 #define RXDMA_BLANK 0x4108UL /* RX Blanking Register */ 220 #define RXDMA_CFG_RINGSZ_32 0x00000000 /* - 32 entries */ 221 #define RXDMA_CFG_RINGSZ_64 0x00000002 /* - 64 entries */ [all …]
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| /linux/drivers/media/pci/cx88/ |
| H A D | cx88-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * cx88x-hw.h - CX2388x register offsets 5 * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de) 92 // DMA Channels 1-6 belong to SPIPE 96 // DMA Channels 9-20 belong to SPIPE 155 #define MO_VIDV_DMA 0x310010 // {64}RWp Video V 156 #define MO_VBI_DMA 0x310018 // {64}RWp VBI (Vertical blanking interval) 200 #define MO_VIDV_GPCNT 0x31C028 // {16}RO Video V general purpose counter 204 #define MO_VIDV_GPCNTRL 0x31C038 // {2}WO Video V general purpose control 482 #define MO_M2M_XSUM 0x35C028 // {32}RO M2M XOR-Checksum [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | command_table.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 38 …(amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_… 43 …amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.ato… 47 bios_cmd_table_para_revision(bp->base.ctx->driver_context, \ 89 if (amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, in bios_cmd_table_para_revision() 125 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v3; in init_dig_encoder_control() 128 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v4; in init_dig_encoder_control() 132 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v5; in init_dig_encoder_control() 153 struct cmd_tbl *cmd_tbl = &bp->cmd_tbl; in init_encoder_control_dig_v1() 156 cmd_tbl->encoder_control_dig1 = encoder_control_dig1_v1; in init_encoder_control_dig_v1() [all …]
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| /linux/include/linux/ |
| H A D | fb.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 77 __u32 serial; /* Serial Number - Integer */ 84 __u16 input; /* display type - see FB_DISP_* */ 85 __u16 dpms; /* DPMS support - see FB_DPMS_ */ 86 __u16 signal; /* Signal Type - see FB_SIGNAL_* */ 89 __u16 gamma; /* Gamma - in fractions of 100 */ 91 __u16 misc; /* Misc flags - see FB_MISC_* */ 133 /* only used by mach-pxa/am200epd.c */ 157 extern int fb_notifier_call_chain(unsigned long val, void *v); 169 static inline int fb_notifier_call_chain(unsigned long val, void *v) in fb_notifier_call_chain() argument [all …]
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