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/linux/Documentation/devicetree/bindings/mtd/
H A Dnand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: mtd.yaml#
18 SPI-NAND devices are concerned by this description.
23 Contains the chip-select IDs.
25 nand-ecc-engine:
27 A phandle on the hardware ECC engine if any. There are
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull-myir-mys-6ulx-eval.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include "imx6ull-myir-mys-6ulx.dtsi"
12 model = "MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND";
13 compatible = "myir,imx6ull-mys-6ulx-eval", "fsl,imx6ull";
17 fsl,use-minimum-ecc;
H A Dimx6ull-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2018-2022 Toradex
16 compatible = "pwm-backlight";
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <6>;
19 enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_gpio_bl_on>;
22 power-supply = <&reg_3v3>;
28 compatible = "gpio-usb-b-connector", "usb-b-connector";
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H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
6 #include <dt-bindings/pwm/pwm.h>
15 brightness-levels = <0 45 63 88 119 158 203 255>;
16 compatible = "pwm-backlight";
17 default-brightness-level = <4>;
18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
21 power-supply = <&reg_module_3v3>;
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/linux/drivers/mtd/nand/raw/
H A Dmtk_nand.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
19 #include <linux/mtd/nand-ecc-mtk.h>
89 #define MTK_NAME "mtk-nand"
146 struct mtk_ecc *ecc; member
185 return (u8 *)p + i * chip->ecc.size; in data_ptr()
197 if (i < mtk_nand->bad_mark.sec) in oob_ptr()
198 poi = chip->oob_poi + (i + 1) * mtk_nand->fdm.reg_size; in oob_ptr()
199 else if (i == mtk_nand->bad_mark.sec) in oob_ptr()
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H A Ddenali.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
6 * Copyright (c) 2017-2019 Socionext Inc.
12 #include <linux/dma-mapping.h>
23 #define DENALI_NAND_NAME "denali-nand"
31 #define DENALI_MAP10 (2 << 26) /* high-level control plane */
39 #define DENALI_BANK(denali) ((denali)->active_bank << 24)
41 #define DENALI_INVALID_BANK -1
50 return container_of(chip->controller, struct denali_controller, in to_denali_controller()
55 * Direct Addressing - the slave address forms the control information (command
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H A Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
10 #include <linux/dma-mapping.h>
34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
185 struct mtd_oob_region ecc; member
207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc()
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H A Dmarvell_nand.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
13 * The main visible difference is that NFCv1 only has Hamming ECC
14 * capabilities, while NFCv2 also embeds a BCH ECC engine. Also, DMA
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
21 * or 4) and each chunk will have its own ECC "digest" of 6B at the
28 * +-
955 marvell_nfc_check_empty_chunk(struct nand_chip * chip,u8 * data,int data_len,u8 * spare,int spare_len,u8 * ecc,int ecc_len,unsigned int * max_bitflips) marvell_nfc_check_empty_chunk() argument
2245 marvell_nand_hw_ecc_controller_init(struct mtd_info * mtd,struct nand_ecc_ctrl * ecc) marvell_nand_hw_ecc_controller_init() argument
2319 marvell_nand_ecc_init(struct mtd_info * mtd,struct nand_ecc_ctrl * ecc) marvell_nand_ecc_init() argument
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/linux/arch/s390/include/uapi/asm/
H A Dpkey.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
31 /* Minimum size of a key blob */
49 /* the newer ioctls use a pkey_key_type enum for type information */
61 /* the newer ioctls use a pkey_key_size enum for key size information */
69 /* some of the newer ioctls use these flags */
124 __u16 cardnr; /* in: card to use or FFFF for any */
136 __u16 cardnr; /* in: card to use or FFFF for any */
149 __u16 cardnr; /* in: card to use or FFFF for any */
249 * (return -1 with errno ENODEV). You may use the PKEY_APQNS4KT ioctl to
253 * generating CCA cipher keys you can use one or more of the PKEY_KEYGEN_*
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/linux/include/linux/
H A Dedac.h6 * 2006-2008 (c) MontaVista Software, Inc. This file is licensed under
26 #define EDAC_OPSTATE_INVAL -1
60 * enum dev_type - describe the type of memory DRAM chips used at the stick
93 * enum hw_event_mc_err_type - type of the detected error
95 * @HW_EVENT_ERR_CORRECTED: Corrected Error - Indicates that an ECC
97 * @HW_EVENT_ERR_UNCORRECTED: Uncorrected Error - Indicates an error that
98 * can't be corrected by ECC, but it is not
101 * it for example, by re-trying the operation).
102 * @HW_EVENT_ERR_DEFERRED: Deferred Error - Indicates an uncorrectable
108 * @HW_EVENT_ERR_FATAL: Fatal Error - Uncorrected error that could not
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/linux/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-core.c1 // SPDX-License-Identifier: GPL-2.0
3 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver
6 // Marc Kleine-Budde <kernel@pengutronix.de>
79 * [-64,63] for TDCO, indicating a relative TDCO.
84 * For TDCO use the max value (63) from the data sheet, but 0 as the
85 * minimum.
115 return __mcp251xfd_get_model_str(priv->devtype_data.model); in mcp251xfd_get_model_str()
160 if (!priv->reg_vd in mcp251xfd_vdd_enable()
648 struct mcp251xfd_ecc *ecc = &priv->ecc; mcp251xfd_chip_ecc_init() local
1202 struct mcp251xfd_ecc *ecc = &priv->ecc; mcp251xfd_handle_serrif() local
1282 struct mcp251xfd_ecc *ecc = &priv->ecc; mcp251xfd_handle_eccif_recover() local
1331 struct mcp251xfd_ecc *ecc = &priv->ecc; mcp251xfd_handle_eccif() local
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/linux/drivers/accel/ivpu/
H A Dvpu_boot_api.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright (c) 2020-2024, Intel Corporation.
11 * fw_bin_header->api_version[VPU_BOOT_API_VER_ID] = (VPU_BOOT_API_VER_MAJOR << 16) |
68 * Size of primary preemption buffer, assuming a 2-job submission queue.
74 * Size of secondary preemption buffer, assuming a 2-job submission queue.
80 * Maximum preemption buffer size that the FW can use: no need for the host
86 /* Space reserved for future preemption-related fields. */
119 /** VPU MCA ECC signalling mode. By default, no signalling is used */
174 u8 use; member
221 /* Clock frequencies: 0x20 - 0xFF */
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/linux/drivers/spi/
H A Dspi-airoha-snfi.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/dma-mapping.h>
24 #include <linux/spi/spi-mem.h>
234 err = regmap_write(as_ctrl->regmap_ctrl, REG_SPI_CTRL_OPFIFO_WDATA, in airoha_snand_set_fifo_op()
240 err = regmap_read_poll_timeout(as_ctrl->regmap_ctrl, in airoha_snand_set_fifo_op()
247 err = regmap_write(as_ctrl->regmap_ctrl, REG_SPI_CTRL_OPFIFO_WR, in airoha_snand_set_fifo_op()
252 return regmap_read_poll_timeout(as_ctrl->regmap_ctrl, in airoha_snand_set_fifo_op()
273 err = regmap_read_poll_timeout(as_ctrl->regmap_ctrl, in airoha_snand_write_data_to_fifo()
281 err = regmap_write(as_ctrl->regmap_ctrl, in airoha_snand_write_data_to_fifo()
288 err = regmap_read_poll_timeout(as_ctrl->regmap_ctrl, in airoha_snand_write_data_to_fifo()
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/linux/drivers/crypto/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
34 Use VIA PadLock for AES algorithm.
39 called padlock-aes.
48 Use VIA PadLock for SHA1/SHA256 algorithms.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
84 kernel or userspace applications may use these functions.
87 - A pkey base and API kernel module (pkey.ko) which offers the
89 and the sysfs API and the in-kernel API to the crypto cipher
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/linux/drivers/net/ethernet/intel/e1000e/
H A Ddefines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
46 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
100 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
101 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
147 /* Use byte values for the following shift parameters
183 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
185 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
238 /* 1000/H is not supported, nor spec-compliant. */
292 #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
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/linux/drivers/net/can/esd/
H A Desdacc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (C) 2015 - 2016 Thomas Körper, esd electronic system design gmbh
3 * Copyright (C) 2017 - 2023 Stefan Mätje, esd electronics gmbh
34 * extraction into an extra variable => (xx - 16).
36 #define ACC_OV_REG_FEAT_MASK_CANFD BIT(27 - 16)
37 #define ACC_OV_REG_FEAT_MASK_NEW_PSC BIT(28 - 16)
38 #define ACC_OV_REG_FEAT_MASK_DAR BIT(30 - 16)
87 /* BRP and BTR register layout for CAN-Classic version */
93 /* BRP and BTR register layout for CAN-FD version */
118 * ACC_CORE_DMAMSG_SIZE and a minimum alignment of ACC_CORE_DMAMSG_SIZE in
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/linux/drivers/mtd/ubi/
H A Dio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * UBI input/output sub-system.
12 * This sub-system provides a uniform way to work with all kinds of the
18 * sub-system validates every single header it reads from the flash media.
24 * (i.e. aligned to the minimum I/O unit size). Data starts next to the VID
35 * @ubi->mtd->writesize field. But as an exception, UBI admits use of another
41 * headers at one NAND page. Thus, UBI may use "sub-page" size as the minimal
42 * I/O unit for the headers (the @ubi->hdrs_min_io_size field). But it still
43 * reports NAND page size (@ubi->min_io_size) as a minimal I/O unit for the UBI
46 * Example: some Samsung NANDs with 2KiB pages allow 4x 512-byte writes, so
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H A Dubi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 #include "ubi-media.h"
57 * This marker in the EBA table means that the LEB is um-mapped.
60 #define UBI_LEB_UNMAPPED -1
64 * returning error. The below constant defines how many times UBI re-tries.
70 * number of (global) erase cycles PEBs are protected from the wear-leveling
76 #define UBI_UNKNOWN -1
89 * Error codes returned by the I/O sub-system.
94 * (uncorrectable ECC error in case of NAND)
98 * (uncorrectable ECC error in case of NAND)
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/linux/drivers/mtd/
H A Dsm_ftl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
16 #include <linux/mtd/nand-ecc-sw-hamming.h>
31 MODULE_PARM_DESC(debug, "Debug level (0-
220 uint8_t ecc[3]; sm_correct_sector() local
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/linux/fs/pstore/
H A Dplatform.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Persistent Storage - platform driver interface parts.
5 * Copyright (C) 2007-2008 Google, Inc.
32 * We defer making "oops" entries appear in pstore - see
36 static int pstore_update_ms = -1;
39 "(default is -1, which means runtime updates are disabled; "
50 "powerpc-ofw",
51 "powerpc-common",
53 "powerpc-opal",
74 MODULE_PARM_DESC(backend, "specific backend to use");
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/linux/drivers/platform/x86/intel/ifs/
H A Difs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * DOC: In-Field Scan
11 * In-Field Scan
15 * ------------
18 * a CPU core to detect problems that are not caught by parity or ECC checks.
20 * with a new platform-device instance-id.
24 * ---------
27 * Look under "In-Field Scan Test Images Download" section towards the
29 * family-model-stepping. IFS Images are not applicable for some test types.
36 * -----------------
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/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
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/linux/arch/arm/boot/dts/ti/omap/
H A Ddra72-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-ipu-dsp-common.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/ti-dra7-atl.h>
13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
20 stdout-path = &uart1;
23 evm_12v0: fixedregulator-evm12v0 {
25 compatible = "regulator-fixed";
[all …]
/linux/drivers/misc/bcm-vk/
H A Dbcm_vk_dev.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2020 Broadcom.
7 #include <linux/dma-mapping.h>
49 {VK_IMAGE_TYPE_BOOT1, {"vk_a0-boot1.bin", "vk-boot1.bin"}},
50 {VK_IMAGE_TYPE_BOOT2, {"vk_a0-boot2.bin", "vk-boot2.bin"}}
53 {VK_IMAGE_TYPE_BOOT1, {"vk_b0-boot1.bin", "vk-boot1.bin"}},
54 {VK_IMAGE_TYPE_BOOT2, {"vk_b0-boot2.bin", "vk-boot2.bin"}}
58 {VK_IMAGE_TYPE_BOOT1, {"vp-boot1.bin", ""}},
59 {VK_IMAGE_TYPE_BOOT2, {"vp-boot2.bin", ""}}
67 /* Allow minimum 1s for Load Image timeout responses */
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/linux/drivers/memory/
H A Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
33 #include <linux/omap-gpmc.h>
37 #include <linux/platform_data/mtd-nand-omap2.h>
39 #define DEVICE_NAME "omap-gpmc"
68 /* GPMC ECC control settings */
100 * As GPMC minimum partition size is 16MB we can only start from
186 /* ECC commands */
187 #define GPMC_ECC_READ 0 /* Reset Hardware ECC for read */
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