| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | atmel-usart.txt | 4 - compatible: Should be one of the following:
5 - "atmel,at91rm9200-usart"
6 - "atmel,at91sam9260-usart"
7 - "microchip,sam9x60-usart"
8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
11 - reg: Should contain registers location and length
12 - interrupts: Should contain interrupt
13 - clock-names: tuple listing input clock names.
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | sam9x60.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
[all …]
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| H A D | at91-kizbox3_common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * at91-kizbox3.dts - Device Tree Include file for Overkiz Kizbox 3
12 /dts-v1/;
14 #include "sama5d2-pinfunc.h"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
17 #include <dt-bindings/pinctrl/at91.h>
18 #include <dt-bindings/pwm/pwm.h>
36 stdout-path = "serial1:115200n8";
41 clock-frequency = <32768>;
[all …]
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| H A D | sama7g5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
[all …]
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| H A D | at91-sama5d27_wlsom1_ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
9 /dts-v1/;
10 #include "at91-sama5d27_wlsom1.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "microchip,sama5d27-wlsom1-e
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | atmel,at91-usart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Richard Genoud <richard.genoud@bootlin.com>
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
20 - const: atmel,at91rm9200-dbgu
[all …]
|
| H A D | qcom,msm-uartdm.txt | 3 The MSM serial UARTDM hardware is designed for high-speed use cases where the
4 transmit and/or receive channels can be offloaded to a dma-engine. From a
9 - compatible: Should contain at least "qcom,msm-uartdm".
12 "qcom,msm-uartdm-v1.1"
13 "qcom,msm-uartdm-v1.2"
14 "qcom,msm-uartdm-v1.3"
15 "qcom,msm-uartdm-v1.4"
16 - reg: Should contain UART register locations and lengths. The first
19 "qcom,msm-uartdm-v1.3" is the only compatible value that might
21 - interrupts: Should contain UART interrupt.
[all …]
|
| /freebsd/share/man/man4/ |
| H A D | bce.4 | 1 .\" Copyright (c) 2006-2014 QLogic Corporation
3 .\" Redistribution and use in source and binary forms, with or without
19 .\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
53 Ethernet controllers which support a TCP Offload Engine (TOE), Remote DMA (RDMA),
62 .Bl -item -offset indent -compact
72 10/100/1000Mbps operation in full-duplex mode
74 10/100Mbps operation in half-duplex mode
[all …]
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| /freebsd/sys/dev/mwl/ |
| H A D | if_mwlvar.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2007-2009 Marvell Semiconductor, Inc.
8 * Redistribution and use in source and binary forms, with or without
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
53 #define MWL_RXDESC 256 /* number of RX descriptors */
56 #define MWL_RXBUF ((5*MWL_RXDESC)/2)/* number of RX dma buffers */
74 * DMA state for tx/rx descriptors.
[all …]
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| /freebsd/sys/dev/gve/ |
| H A D | gve_utils.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2023-2024 Google LLC
6 * Redistribution and use in source and binary forms, with or without modification,
26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
37 return (be32toh(bus_read_4(priv->reg_bar, offset))); in gve_reg_bar_read_4()
43 bus_write_4(priv->reg_bar, offset, htobe32(val)); in gve_reg_bar_write_4()
49 bus_write_4(priv->db_bar, offset, htobe32(val)); in gve_db_bar_write_4()
55 bus_write_4(priv->db_bar, offset, val); in gve_db_bar_dqo_write_4()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | fsl-mxs-dma.txt | 1 * Freescale MXS DMA
4 - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
5 - reg : Should contain registers location and length
6 - interrupts : Should contain the interrupt numbers of DMA channels.
8 - #dma-cells : Must be <1>. The number cell specifies the channel ID.
9 - dma-channels : Number of channels supported by the DMA controller
12 - interrupt-names : Name of DMA channel interrupts
19 dma_apbh: dma-apbh@80004000 {
20 compatible = "fsl,imx28-dma-apbh";
26 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
[all …]
|
| H A D | ste-dma40.txt | 1 * DMA40 DMA Controller
4 - compatible: "stericsson,dma40"
5 - reg: Address range of the DMAC registers
6 - reg-names: Names of the above areas to use during resource look-up
7 - interrupt: Should contain the DMAC interrupt number
8 - #dma-cells: must be <3>
9 - memcpy-channels: Channels to be used for memcpy
12 - dma-channels: Number of channels supported by hardware - if not present
14 - disabled-channels: Channels which can not be used
18 dma: dma-controller@801c0000 {
[all …]
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| /freebsd/sys/dev/ath/ath_hal/ar5210/ |
| H A D | ar5210reg.h | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2004 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 * Processor for IEEE 802.11a 5-GHz Wireless LANs.
33 /* DMA Registers */
37 #define AR_RXDP 0x000c /* RX queue descriptor ptr register */
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | xlnx,axi-ethernet.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 segments of memory for buffering TX and RX, as well as the capability of
14 offloading TX/RX checksum calculation off the processor.
17 sent and received through means of an AXI DMA controller. This driver
18 includes the DMA driver code, so this driver is incompatible with AXI DMA
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
[all …]
|
| H A D | xilinx_axienet.txt | 2 --------------------------------------------------------
7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
11 sent and received through means of an AXI DMA controller. This driver
12 includes the DMA driver code, so this driver is incompatible with AXI DMA
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
20 - reg : Address and length of the IO space, as well as the address
21 and length of the AXI DMA controller IO space, unless
22 axistream-connected is specified, in which case the reg
[all …]
|
| H A D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
[all …]
|
| H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | davinci-mcasp-audio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-choudhary@ti.com>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
[all …]
|
| /freebsd/sys/dev/cas/ |
| H A D | if_casvar.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
8 * Redistribution and use in source and binary forms, with or without
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * from: FreeBSD: if_gemvar.h 177560 2008-03-24 17:23:53Z marius
43 * Transmit descriptor ring size - this is arbitrary, but allocate
53 #define CAS_MAXTXFREE (CAS_NTXDESC - 1)
54 #define CAS_NTXDESC_MASK (CAS_NTXDESC - 1)
58 * Receive completion ring size - we have one completion per
[all …]
|
| /freebsd/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212desc.h | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Hardware-specific descriptor structures.
27 * AR5212-specific tx/rx descriptor definition.
32 uint32_t ds_ctl0; /* DMA control 0 */
[all …]
|
| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-fh.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021, 2023-2024 Intel Corporation
4 * Copyright (C) 2015-2017 Intel Deutschland GmbH
12 #include "iwl-tran
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/soc/ti/ |
| H A D | keystone-navigator-dma.txt | 1 Keystone Navigator DMA Controller
3 This document explains the device tree bindings for the packet dma
4 on keystone devices. The Keystone Navigator DMA driver sets up the dma
8 CRYPTO Engines etc has its own instance of dma hardware. QMSS has also
9 an internal packet DMA module which is used as an infrastructure DMA
12 Navigator DMA cloud layout:
13 ------------------
15 ------------------
17 |-> DMA instance #0
19 |-> DMA instance #1
[all …]
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| /freebsd/sys/dev/malo/ |
| H A D | if_malo.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
9 * Redistribution and use in source and binary forms, with or without
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
48 #define MALO_RXBUF 256 /* number of RX descriptors/buffers */
213 uint32_t rxpdwrptr; /* Rx shared memory queue */
245 uint16_t action; /* 0 -> unset, 1 -> set */
267 /* 0: retry count is not valid, 1: use retry count specified */
286 /* use fixed rate specified but firmware can drop to */
[all …]
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| /freebsd/sys/dev/vge/ |
| H A D | if_vgereg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
7 * Redistribution and use in source and binary forms, with or without
15 * 3. All advertising materials mentioning features or use of this software
18 * 4. Neither the name of the author nor the names of any co-contributors
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
37 * Definitions for the built-in copper PHY can be found in vgphy.h.
41 * using 32-bit I/O cycles, but some of them are less than 32 bits
54 #define VGE_RXCTL 0x06 /* RX control register */
[all …]
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| /freebsd/sys/dev/gem/ |
| H A D | if_gemvar.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
7 * Redistribution and use in source and binary forms, with or without
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * Transmit descriptor ring size - this is arbitrary, but allocate
48 #define GEM_MAXTXFREE (GEM_NTXDESC - 1)
49 #define GEM_NTXDESC_MASK (GEM_NTXDESC - 1)
53 * Receive descriptor ring size - we have one RX buffer per incoming
57 #define GEM_NRXDESC_MASK (GEM_NRXDESC - 1)
[all …]
|