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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dnvidia,tegra124-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
20 - description: NVIDIA Tegra124
21 const: nvidia,tegra124-xusb
23 - description: NVIDIA Tegra132
25 - const: nvidia,tegra132-xusb
[all …]
H A Dnvidia,tegra124-xusb.txt8 --------------------
9 - compatible: Must be:
10 - Tegra124: "nvidia,tegra124-xusb"
11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12 - Tegra210: "nvidia,tegra210-xusb"
13 - Tegra186: "nvidia,tegra186-xusb"
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
16 - reg-names: Must contain the following entries:
17 - "hcd"
18 - "fpci"
[all …]
H A Dnvidia,tegra210-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra210-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24 - description: base and length of the XUSB IPFS registers
[all …]
H A Dnvidia,tegra-xudc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
11 USB 3.0 SuperSpeed protocols.
14 - Nagarjuna Kristam <nkristam@nvidia.com>
15 - JC Kuo <jckuo@nvidia.com>
16 - Thierry Reding <treding@nvidia.com>
21 - enum:
[all …]
H A Dti,hd3ss3220.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
12 description: |-
13 HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel
14 Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The
31 SS data bus to the SS capable connector.
36 description: Super Speed (SS) MUX inputs connected to SS capable connector.
[all …]
H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
27 $ref: usb.yaml#
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
[all …]
H A Dusb-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB Orientation and Mode Switches Common Properties
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 Common properties for devices handling USB mode and orientation switching.
16 mode-switch:
20 orientation-switch:
24 retimer-switch:
[all …]
H A Dnvidia,tegra194-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra194-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
25 reg-names:
[all …]
H A Dnvidia,tegra186-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra186-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
25 reg-names:
[all …]
H A Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
4 as described in 'usb/generic.txt'
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
[all …]
H A Dnxp,ptn36502.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/nxp,ptn36502.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PTN36502 Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo redriver
10 - Luca Weiss <luca.weiss@fairphone.com>
15 - nxp,ptn36502
20 vdd18-supply:
23 orientation-switch: true
24 retimer-switch: true
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xus
[all...]
H A Dtransmit-amplitude.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
[all …]
H A Dqcom,ipq806x-usb-phy-ss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-ss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER
10 - Ansuel Smith <ansuelsmth@gmail.com>
13 DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
19 const: qcom,ipq806x-usb-phy-ss
21 "#phy-cells":
31 clock-names:
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dbrcm,stingray-usb-phy.txt1 Broadcom Stingray USB PHY
4 - compatible : should be one of the listed compatibles
5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
6 - "brcm,sr-usb-hs-phy" is a single HS PHY.
7 - reg: offset and length of the PHY blocks registers
8 - #phy-cells:
9 - Must be 1 for brcm,sr-usb-combo-phy as it expects one argument to indicate
10 the PHY number of two PHYs. 0 for HS PHY and 1 for SS PHY.
11 - Must be 0 for brcm,sr-usb-hs-phy.
13 Refer to phy/phy-bindings.txt for the generic PHY binding properties
[all …]
H A Dqcom,usb-ss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
13 Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
18 - qcom,usb-ss-28nm-phy
23 "#phy-cells":
28 - description: rpmcc clock
[all …]
H A Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
27 "port" is typically used to denote the physical USB receptacle. The device
29 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
[all …]
H A Dqcom-usb-ipq4019-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom-usb-ipq4019-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcom IPQ40xx Dakota HS/SS USB PHY
10 - Robert Marko <robert.marko@sartura.hr>
15 - qcom,usb-ss-ipq4019-phy
16 - qcom,usb-hs-ipq4019-phy
24 reset-names:
26 - const: por_rst
[all …]
/freebsd/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7921/
H A DKconfig1 # SPDX-License-Identifier: ISC
13 This adds support for MT7921E 802.11ax 2x2:2SS wireless devices.
24 This adds support for MT7921S 802.11ax 2x2:2SS wireless devices.
29 tristate "MediaTek MT7921U (USB) support"
33 depends on USB
35 This adds support for MT7921U 802.11ax 2x2:2SS wireless devices.
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dqcom-soc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/qcom-so
[all...]
/freebsd/usr.sbin/bluetooth/bthidcontrol/
H A Dsdp.c1 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
38 #include <dev/usb/usb.h>
39 #include <dev/usb/usbhid.h>
97 if (ss != NULL) { \
98 sdp_close(ss); \
118 void *ss = NULL; hid_sdp_query() local
[all...]

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