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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dgeneric-ehci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB EHCI Controller
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: usb-hcd.yaml
14 - if:
19 const: ibm,usb-ehci-440epx
28 - items:
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H A Dmsm-hsusb.txt3 EHCI
6 - compatible: Should contain "qcom,ehci-host"
7 - regs: offset and length of the register set in the memory map
8 - usb-phy: phandle for the PHY device
10 Example EHCI controller device node:
12 ehci
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H A Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
[all …]
H A Dehci-orion.txt1 * EHCI controller, Orion Marvell variants
4 - compatible: must be one of the following
5 "marvell,orion-ehci"
6 "marvell,armada-3700-ehci"
7 - reg: physical base address of the controller and length of memory mapped
9 - interrupts: The EHCI interrupt
12 - clocks: reference to the clock
13 - phys: reference to the USB PHY
14 - phy-names: name of the USB PHY, should be "usb"
18 ehci@50000 {
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H A Datmel-usb.txt1 Atmel SOC USB controllers
6 - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers
8 - reg: Address and length of the register set for the device
9 - interrupts: Should contain ohci interrupt
10 - clocks: Should reference the peripheral, host and system clocks
11 - clock-names: Should contain three strings
15 - num-ports: Number of ports.
16 - atmel,vbus-gpio: If present, specifies a gpio that needs to be
18 - atmel,oc-gpio: If present, specifies a gpio that needs to be
22 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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H A Dehci-st.txt1 ST USB EHCI controller
4 - compatible : must be "st,st-ehci-300x"
5 - reg : physical base addresses of the controller and length of memory mapped
7 - interrupts : one EHCI interrupt should be described here
8 - pinctrl-names : a pinctrl state named "default" must be defined
9 - pinctrl-0 : phandle referencing pin configuration of the USB controller
10 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
11 - clocks : phandle list of usb clocks
12 - clock-names : should be "ic" for interconnect clock and "clk48"
13 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
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H A Dspear-usb.txt1 ST SPEAr SoC USB controllers:
2 -----------------------------
4 EHCI:
5 -----
8 - compatible: "st,spear600-ehci"
9 - interrupts: Should contain the EHCI interrupt
13 ehci@e1800000 {
14 compatible = "st,spear600-ehci", "usb-ehci";
16 interrupt-parent = <&vic1>;
22 -----
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H A Dbrcm,bcm7445-ehci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/brcm,bcm7445-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB USB EHCI Controller
10 - $ref: usb-hcd.yaml
13 - Al Cooper <alcooperx@gmail.com>
17 const: brcm,bcm7445-ehci
27 description: Clock specifier for the EHCI clock
29 clock-names:
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H A Dmarvell,pxau2o-ehci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Marvell PXA/MMP EHCI
11 - Lubomir Rintel <lkundrak@v3.sk>
14 - $ref: usb-hcd.yaml#
18 const: marvell,pxau2o-ehci
29 clock-names:
35 phy-names:
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H A Dehci-omap.txt1 OMAP HS USB EHCI controller
3 This device is usually the child of the omap-usb-host
4 Documentation/devicetree/bindings/mfd/omap-usb-host.txt
8 - compatible: should be "ti,ehci-omap"
9 - reg: should contain one register range i.e. start and length
10 - interrupts: description of the interrupt line
14 - phys: list of phandles to PHY nodes.
19 Documentation/devicetree/bindings/mfd/omap-usb-host.txt
23 usbhsehci: ehci@4a064c00 {
24 compatible = "ti,ehci-omap";
H A Dexynos-usb.txt1 Samsung Exynos SoC USB controller
3 The USB devices interface with USB controllers on Exynos SOCs.
6 EHCI
8 - compatible: should be "samsung,exynos4210-ehci" for USB 2.0
9 EHCI controller in host mode.
10 - reg: physical base address of the controller and length of memory mapped
12 - interrupts: interrupt number to the cpu.
13 - clocks: from common clock binding: handle to usb clock.
14 - clock-names: from common clock binding: Shall be "usbhost".
15 - phys: from the *Generic PHY* bindings; array specifying phy(s) used
[all …]
H A Dsamsung,exynos-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/samsung,exynos-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,exynos4210-ehci
16 - samsung,exynos4210-ohci
21 clock-names:
23 - const: usbhost
[all …]
H A Dnpcm7xx-usb.txt1 Nuvoton NPCM7XX SoC USB controllers:
2 -----------------------------
4 EHCI:
5 -----
8 - compatible: should be one of
9 "nuvoton,npcm750-ehci"
10 "nuvoton,npcm845-ehci"
11 - interrupts: Should contain the EHCI interrupt
12 - reg: Physical address and length of the register set for the device
16 ehci1: usb@f0806000 {
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H A Dnvidia,tegra20-ehci.txt1 Tegra SOC USB controllers
3 The device node for a USB controller that is part of a Tegra
9 - compatible : For Tegra20, must contain "nvidia,tegra20-ehci".
10 For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain
11 "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is
13 - nvidia,phy : phandle of the PHY that the controller is connected to.
14 - clocks : Must contain one entry, for the module clock.
15 See ../clocks/clock-bindings.txt for details.
16 - resets : Must contain an entry for each entry in reset-names.
18 - reset-names : Must include the following entries:
[all …]
/freebsd/share/man/man4/
H A Dehci.41 .\" $NetBSD: ehci.4,v 1.8 2001/11/21 17:22:56 augustss Exp $
34 .Nm ehci
35 .Nd USB Enhanced Host Controller driver
37 .Cd "device ehci"
42 .Tn USB
45 .Tn USB
48 .Tn EHCI
50 .Tn USB
57 handling USB 1.x devices.
59 .Tn USB
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/freebsd/sys/dev/usb/controller/
H A Dehci_imx.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2012 Semihalf
35 * EHCI driver for Freescale i.MX SoCs which incorporate the USBOH3 controller.
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usb_busdma.h>
52 #include <dev/usb/usb_process.h>
53 #include <dev/usb/usb_controller.h>
54 #include <dev/usb/usb_bus.h>
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H A Dehci_pci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
36 * The EHCI 1.0 spec can be found at
37 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
38 * and the USB 2.0 spec at
39 * http://www.usb.org/developers/docs/usb_20.zip
42 /* The low level controller code for EHCI has been split into
43 * PCI probes and EHCI specific code. This was done to facilitate the
66 #include <dev/usb/usb.h>
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H A Dehci_mv.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
35 * FDT attachment driver for the USB Enhanced Host Controller.
62 #include <dev/usb/usb.h>
63 #include <dev/usb/usbdi.h>
65 #include <dev/usb/usb_core.h>
66 #include <dev/usb/usb_busdma.h>
67 #include <dev/usb/usb_process.h>
68 #include <dev/usb/usb_util.h>
70 #include <dev/usb/usb_controller.h>
[all …]
H A Dgeneric_ehci_acpi.c1 /*-
40 #include <dev/usb/usb.h>
41 #include <dev/usb/usbdi.h>
43 #include <dev/usb/usb_core.h>
44 #include <dev/usb/usb_busdma.h>
45 #include <dev/usb/usb_process.h>
47 #include <dev/usb/usb_controller.h>
48 #include <dev/usb/usb_bus.h>
49 #include <dev/usb/controller/ehci.h>
66 device_set_desc(self, "Generic EHCI Controller"); in generic_ehci_acpi_probe()
[all …]
H A Dehci_fsl.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2012 Semihalf
45 #include <dev/usb/usb.h>
46 #include <dev/usb/usbdi.h>
47 #include <dev/usb/usb_core.h>
48 #include <dev/usb/usb_busdma.h>
49 #include <dev/usb/usb_process.h>
50 #include <dev/usb/usb_util.h>
51 #include <dev/usb/usb_controller.h>
[all …]
H A Dgeneric_ehci.c1 /*-
32 * Generic EHCI driver based on the Allwinner A10 EHCI driver
47 #include <dev/usb/usb.h>
48 #include <dev/usb/usbdi.h>
50 #include <dev/usb/usb_core.h>
51 #include <dev/usb/usb_busdma.h>
52 #include <dev/usb/usb_process.h>
53 #include <dev/usb/usb_util.h>
55 #include <dev/usb/usb_controller.h>
56 #include <dev/usb/usb_bus.h>
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Domap-usb-host.txt1 OMAP HS USB Host
5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
[all …]
/freebsd/sys/arm/nvidia/
H A Dtegra_ehci.c1 /*-
29 * EHCI driver for Tegra SoCs.
50 #include <dev/usb/usb.h>
51 #include <dev/usb/usbdi.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_controller.h>
55 #include <dev/usb/usb_bus.h>
56 #include <dev/usb/controller/ehci.h>
57 #include <dev/usb/controller/ehcireg.h>
[all …]
/freebsd/stand/usb/
H A Dusbcore.mk3 # Copyright (c) 2013-2020 Hans Petter Selasky.
8 # Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
45 ${S}/dev/usb \
46 ${S}/dev/usb/controller \
47 ${S}/dev/usb/serial \
48 ${S}/dev/usb/storage \
49 ${S}/dev/usb/template \
55 CFLAGS+= -DUSB_MSCTEST_BULK_SIZE=65536
56 CFLAGS+= -DUSB_POOL_SIZE=${USB_POOL_SIZE}
65 # USB controller drivers
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Drcar-gen2-phy.txt1 * Renesas R-Car generation 2 USB PHY
3 This file provides information on what the device node for the R-Car generation
4 2 USB PHY contains.
7 - compatible: "renesas,usb-phy-r8a7742" if the device is a part of R8A7742 SoC.
8 "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
9 "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
10 "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
11 "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.
12 "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
13 "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
[all …]

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