| /linux/Documentation/networking/dsa/ |
| H A D | configuration.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 network configuration suites by now and has to be performed manually.
10 .. _dsa-config-showcases:
13 -----------------------
15 To configure a DSA switch a couple of commands need to be executed. In this
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
37 The user interfaces depend on the conduit interface being up in order for them
38 to send or receive traffic. Prior to kernel v5.12, the state of the conduit
39 interface had to be managed explicitly by the user. Starting with kernel v5.12,
42 - when a DSA user interface is brought up, the conduit interface is
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| H A D | b53.rst | 1 .. SPDX-License-Identifier: GPL-2.0
20 The switch is, if possible, configured to enable a Broadcom specific 4-bytes
21 switch tag which gets inserted by the switch for every packet forwarded to the
30 configuration described in the :ref:`dsa-config-showcases`.
33 ----------------------------------
35 The tagging based configuration is desired. It is not specific to the b53
38 See :ref:`dsa-tagged-configuration`.
41 -------------------------------------
48 The configuration slightly differ from the :ref:`dsa-vlan-configuration`.
54 In difference to the configuration described in :ref:`dsa-vlan-configuration`
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| /linux/drivers/tty/serial/8250/ |
| H A D | 8250_core.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Universal/legacy driver for 8250/16550-type serial ports
11 * userspace-configurable "phantom" ports
52 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
58 * Alan disagrees, saying that need the complexity to handle the weird
61 * In order to handle ISA shared interrupts properly, we need to check
63 * line has been de-asserted.
65 * This means we need to loop through all ports. checking that they
76 spin_lock(&i->lock); in serial8250_interrupt()
78 l = i->head; in serial8250_interrupt()
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| H A D | 8250_mtk.c | 1 // SPDX-License-Identifier: GPL-2.0+
19 #include <linux/dma-mapping.h>
89 static void mtk8250_rx_dma(struct uart_8250_port *up);
93 struct uart_8250_port *up = param; in mtk8250_dma_rx_complete() local
94 struct uart_8250_dma *dma = up->dma; in mtk8250_dma_rx_complete()
95 struct mtk8250_data *data = up->port.private_data; in mtk8250_dma_rx_complete()
96 struct tty_port *tty_port = &up->port.state->port; in mtk8250_dma_rx_complete()
102 if (data->rx_status == DMA_RX_SHUTDOWN) in mtk8250_dma_rx_complete()
105 uart_port_lock_irqsave(&up->port, &flags); in mtk8250_dma_rx_complete()
107 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in mtk8250_dma_rx_complete()
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| H A D | 8250_fsl.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * handler to deal with an errata and provide ACPI wrapper.
15 * We re-use the already existing "bug handling" lsr_saved_flags
16 * field to carry the "what we just did" information from the one
17 * IRQ event to the next one.
31 struct uart_8250_port *up = up_to_u8250p(port); in fsl8250_handle_irq() local
33 uart_port_lock_irqsave(&up->port, &flags); in fsl8250_handle_irq()
35 iir = port->serial_in(port, UART_IIR); in fsl8250_handle_irq()
37 uart_port_unlock_irqrestore(&up->port, flags); in fsl8250_handle_irq()
45 * that (theoretically) corresponds to ~3500 interrupts in these 0.3s. in fsl8250_handle_irq()
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| H A D | 8250_uniphier.c | 1 // SPDX-License-Identifier: GPL-2.0+
16 * This hardware is similar to 8250, but its register map is a bit different:
17 * - MMIO32 (regshift = 2)
18 * - FCR is not at 2, but 3
19 * - LCR and MCR are not at 3 and 4, they share 4
20 * - No SCR (Instead, CHAR can be used as a scratch register)
21 * - Divisor latch at 9, no divisor latch access bit
43 if (!device->port.membase) in uniphier_early_console_setup()
44 return -ENODEV; in uniphier_early_console_setup()
47 device->port.iotype = UPIO_MEM32; in uniphier_early_console_setup()
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| /linux/drivers/tty/serial/ |
| H A D | omap-serial.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for OMAP-UART controller.
14 * features like DMA, it makes easier to implement features like DMA and
16 * this driver as required for the omap-platform.
38 #include <linux/platform_data/serial-omap.h>
79 #define OMAP_UART_DMA_CH_FREE -1
118 /* timer to poll activity on rx dma */
172 static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
174 static inline unsigned int serial_in(struct uart_omap_port *up, int offset) in serial_in() argument
176 offset <<= up->port.regshift; in serial_in()
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| H A D | pxa.c | 1 // SPDX-License-Identifier: GPL-2.0+
11 * easier to add DMA support.
14 * If someone else wants to request an "official" allocation of major/minor
16 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
18 * with the serial core maintainer satisfaction to appear soon.
52 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) in serial_in() argument
55 return readl(up->port.membase + offset); in serial_in()
58 static inline void serial_out(struct uart_pxa_port *up, int offset, int value) in serial_out() argument
61 writel(value, up->port.membase + offset); in serial_out()
66 struct uart_pxa_port *up = (struct uart_pxa_port *)port; in serial_pxa_enable_ms() local
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| H A D | sunsu.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
8 * This is mainly a variation of 8250.c, credits go to authors mentioned
12 * Fixed to use tty_get_baud_rate().
13 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
15 * Converted to new 2.5.x UART layer.
16 * David S. Miller (davem@davemloft.net), 2002-Jul-29
104 static unsigned int serial_in(struct uart_sunsu_port *up, int offset) in serial_in() argument
106 offset <<= up->port.regshift; in serial_in()
108 switch (up->port.iotype) { in serial_in()
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| H A D | serial_txx9.c | 1 // SPDX-License-Identifier: GPL-2.0
10 * Copyright (C) 2000-2002 Toshiba Corporation
159 static inline unsigned int sio_in(struct uart_port *up, int offset) in sio_in() argument
161 switch (up->iotype) { in sio_in()
163 return __raw_readl(up->membase + offset); in sio_in()
165 return inl(up->iobase + offset); in sio_in()
170 sio_out(struct uart_port *up, int offset, int value) in sio_out() argument
172 switch (up->iotype) { in sio_out()
174 __raw_writel(value, up->membase + offset); in sio_out()
177 outl(value, up->iobase + offset); in sio_out()
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| H A D | sunzilog.c | 1 // SPDX-License-Identifier: GPL-2.0
9 * much has been rewritten. Credits therefore go out to Eddie
48 /* On 32-bit sparcs we need to delay after register accesses
49 * to accommodate sun4 systems, but we do not need to flush writes.
50 * On 64-bit sparc we only need to flush single writes to ensure
61 readb(&((__channel)->control))
105 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase))
108 #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB) argument
109 #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE) argument
110 #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS) argument
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| H A D | ar933x_uart.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Atheros AR933X SoC built-in UART driver
31 #include <asm/mach-ath79/ar933x_uart.h>
35 #define DRIVER_NAME "ar933x-uart"
57 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, in ar933x_uart_read() argument
60 return readl(up->port.membase + offset); in ar933x_uart_read()
63 static inline void ar933x_uart_write(struct ar933x_uart_port *up, in ar933x_uart_write() argument
66 writel(value, up->port.membase + offset); in ar933x_uart_write()
69 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, in ar933x_uart_rmw() argument
76 t = ar933x_uart_read(up, offset); in ar933x_uart_rmw()
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| H A D | ma35d1_serial.c | 1 // SPDX-License-Identifier: GPL-2.0+
36 /* MA35_IER_REG - Interrupt Enable Register */
40 #define MA35_IER_RTO_IEN BIT(4) /* RX Time-out Interrupt Enable */
42 #define MA35_IER_TIME_OUT_EN BIT(11) /* RX Buffer Time-out Counter Enable */
43 #define MA35_IER_AUTO_RTS BIT(12) /* nRTS Auto-flow Control Enable */
44 #define MA35_IER_AUTO_CTS BIT(13) /* nCTS Auto-flow Control Enable */
46 /* MA35_FCR_REG - FIFO Control Register */
62 /* MA35_LCR_REG - Line Control Register */
74 /* MA35_MCR_REG - Modem Control Register */
79 /* MA35_MSR_REG - Modem Status Register */
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| H A D | sunsab.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Rewrote buffer handling to use CIRC(Circular Buffer) macros.
10 * Fixed to use tty_get_baud_rate, and to allow for arbitrary baud
11 * rates to be programmed into the UART. Also eliminated a lot of
13 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
15 * Ported to new 2.5.x UART layer.
64 * can cause garbage characters to get emitted by the chip.
92 static __inline__ void sunsab_tec_wait(struct uart_sunsab_port *up) in sunsab_tec_wait() argument
94 int timeout = up->tec_timeout; in sunsab_tec_wait()
96 while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout) in sunsab_tec_wait()
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| /linux/lib/crypto/mpi/ |
| H A D | mpih-mul.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* mpihelp-mul.c - MPI helper functions
10 * way the data is stored; this is to support the abstraction
12 * to avoid revealing of sensitive data due to paging etc.
14 * however I decided to publish this code under the plain GPL.
18 #include "mpi-internal.h"
21 #define MPN_MUL_N_RECURSE(prodp, up, vp, size, tspace) \ argument
24 mul_n_basecase(prodp, up, vp, size); \
26 mul_n(prodp, up, vp, size, tspace); \
29 #define MPN_SQR_N_RECURSE(prodp, up, size, tspace) \ argument
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| /linux/drivers/net/can/usb/ |
| H A D | ucan.c | 1 // SPDX-License-Identifier: GPL-2.0
41 /* the CAN controller needs a while to enable/disable the bus */
48 * ------------------------
64 * m[n] is is aligned to a 4 byte boundary, hence
79 /* start the can transceiver - val defines the operation mode */
83 /* send can transceiver into low-power sleep mode */
85 /* wake up can transceiver from low-power sleep mode */
89 /* get piece of info from the can transceiver - subcmd defines what
93 /* clear or disable hardware filter - subcmd defines which of the two */
97 /* recover from bus-off state */
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| /linux/Documentation/admin-guide/aoe/ |
| H A D | aoe.rst | 4 ATA over Ethernet is a network protocol that provides simple access to
11 http://support.coraid.com/support/linux/EtherDrive-2.6-HOWTO.html
16 http://support.coraid.com/support/linux/EtherDrive-2.6-HOWTO-5.html#ss5.19
18 The aoetools are userland programs that are designed to work with this
23 The scripts in this Documentation/admin-guide/aoe directory are intended to
32 automatically, but to create all the necessary device nodes, use the
35 There is a udev-install.sh script that shows how to install these
38 There is also an autoload script that shows how to edit
39 /etc/modprobe.d/aoe.conf to ensure that the aoe module is loaded when
40 necessary. Preloading the aoe module is preferable to autoloading,
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/ |
| H A D | uar.c | 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
74 system_page_index = index >> (PAGE_SHIFT - MLX5_ADAPTER_PAGE_SHIFT); in uar2pfn()
78 return (mdev->bar_addr >> PAGE_SHIFT) + system_page_index; in uar2pfn()
83 struct mlx5_uars_page *up = container_of(kref, struct mlx5_uars_page, ref_count); in up_rel_func() local
85 list_del(&up->list); in up_rel_func()
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| /linux/include/linux/ |
| H A D | serial_core.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 ((port)->cons && (port)->cons->index == (port)->line)
37 * struct uart_ops -- interface between serial_core and the driver
55 * This function sets the modem control lines for @port to the state
58 * - %TIOCM_RTS RTS signal.
59 * - %TIOCM_DTR DTR signal.
60 * - %TIOCM_OUT1 OUT1 signal.
61 * - %TIOCM_OUT2 OUT2 signal.
62 * - %TIOCM_LOOP Set the port into loopback mode.
68 * Locking: @port->lock taken.
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| /linux/Documentation/networking/ |
| H A D | vrf.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 The VRF device combined with ip rules provides the ability to create virtual
11 routing and forwarding domains (aka VRFs, VRF-lite to be specific) in the
12 Linux network stack. One use case is the multi-tenancy problem where each
16 Processes can be "VRF aware" by binding a socket to the VRF device. Packets
20 (ie., they do not need to be run in each VRF). The design also allows
21 the use of higher priority ip rules (Policy Based Routing, PBR) to take
24 In addition, VRF devices allow VRFs to be nested within namespaces. For
30 ------
32 are then enslaved to a VRF device::
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-devices-power | 6 allowing the user space to check and modify some power
14 space to check if the device is enabled to wake up the system
15 from sleep states, such as the memory sleep state (suspend to
16 RAM) and hibernation (suspend to disk), and to enable or disable
17 it to do that as desired.
20 used to activate the system from a sleep state. Such devices
24 + "enabled\n" to issue the events;
25 + "disabled\n" not to do so;
29 "disabled" to it.
33 be enabled to wake up the system from sleep states.
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| /linux/tools/testing/selftests/drivers/net/mlxsw/ |
| H A D | vxlan.sh | 2 # SPDX-License-Identifier: GPL-2.0
4 # Test various aspects of VxLAN offloading which are specific to mlxsw, such
45 ip link set dev $swp1 up
46 ip link set dev $swp2 up
91 ip link add name vxlan0 up type vxlan id 10 nolearning $UDPCSUM_FLAFS \
99 log_test "vxlan device - valid configuration"
108 ip link add name vxlan0 up type vxlan id 10 nolearning $UDPCSUM_FLAFS \
116 log_test "vxlan device with a vlan-aware bridge"
125 ip link add name vxlan0 up type vxlan id 10 nolearning $UDPCSUM_FLAFS \
141 ip link add name dummy1 up type dummy
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| /linux/Documentation/arch/arm/ |
| H A D | cluster-pm-race-avoidance.rst | 2 Cluster-wide Power-up/power-down race avoidance algorithm
5 This file documents the algorithm which is used to coordinate CPU and
6 cluster setup and teardown operations and to manage hardware coherency
16 ---------
18 In a system containing multiple CPUs, it is desirable to have the
19 ability to turn off individual CPUs when the system is idle, reducing
23 to have the ability to turn off entire clusters.
27 of independently running CPUs, while the OS continues to run. This
28 means that we need some coordination in order to ensure that critical
29 cluster-level operations are only performed when it is truly safe to do
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| /linux/Documentation/filesystems/ |
| H A D | idmappings.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 reading from or writing ownership to disk, reporting ownership to userspace, or
9 want to know how idmappings work.
12 ------------
23 on, we will always prefix ids with ``u`` or ``k`` to make it clear whether
26 To see what this looks like in practice, let's take the following idmapping::
32 u22 -> k10000
33 u23 -> k10001
34 u24 -> k10002
36 From a mathematical viewpoint ``U`` and ``K`` are well-ordered sets and an
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | fsl,mxs-pinctrl.txt | 6 voltage and pull-up.
9 - compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"
10 - reg: Should contain the register physical address and length for the
13 Please refer to pinctrl-bindings.txt in this directory for details of the
20 information about pull-up. For this reason, even seemingly boolean values are
26 One is to set up a group of pins for a function, both mux selection and pin
28 one is to adjust the pin configuration for some particular pins that need a
33 means a group of pins put together for particular peripheral to work in
34 particular function, like SSP0 functioning as mmc0-8bit. That said, the
37 "pinctrl-*" phandle in client device node should only have one group node
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