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/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Duncore-cache.json10 "Unit": "CHACMS" string
20 "Unit": "CHACMS" string
29 "Unit": "CHA" string
32 …"BriefDescription": "Counts transactions that looked into the multi-socket cacheline Directory sta…
39 "Unit": "CHA" string
42 …"BriefDescription": "Counts transactions that looked into the multi-socket cacheline Directory st…
49 "Unit": "CHA" string
52 …"BriefDescription": "Counts only multi-socket cacheline Directory state updates memory writes issu…
59 "Unit": "CHA" string
62 …"BriefDescription": "Counts only multi-socket cacheline Directory state updates due to memory writ…
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/linux/tools/perf/pmu-events/arch/x86/sierraforest/
H A Duncore-cache.json10 "Unit": "CHACMS" string
20 "Unit": "CHACMS" string
29 "Unit": "CHA" string
32 …"BriefDescription": "Counts transactions that looked into the multi-socket cacheline Directory sta…
39 "Unit": "CHA" string
42 …"BriefDescription": "Counts transactions that looked into the multi-socket cacheline Directory st…
49 "Unit": "CHA" string
52 …"BriefDescription": "Counts only multi-socket cacheline Directory state updates memory writes issu…
59 "Unit": "CHA" string
62 …"BriefDescription": "Counts only multi-socket cacheline Directory state updates due to memory writ…
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/linux/Documentation/hwmon/
H A Dnct6775.rst15 Addresses scanned: ISA address retrieved from Super I/O registers
19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
23 Addresses scanned: ISA address retrieved from Super I/O registers
31 Addresses scanned: ISA address retrieved from Super I/O registers
39 Addresses scanned: ISA address retrieved from Super I/O registers
47 Addresses scanned: ISA address retrieved from Super I/O registers
55 Addresses scanned: ISA address retrieved from Super I/O registers
63 Addresses scanned: ISA address retrieved from Super I/O registers
71 Addresses scanned: ISA address retrieved from Super I/O registers
79 Addresses scanned: ISA address retrieved from Super I/O registers
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H A Dw83627ehf.rst10 Addresses scanned: ISA address retrieved from Super I/O registers
18 Addresses scanned: ISA address retrieved from Super I/O registers
22 * Winbond W83627DHG-P
26 Addresses scanned: ISA address retrieved from Super I/O registers
34 Addresses scanned: ISA address retrieved from Super I/O registers
42 Addresses scanned: ISA address retrieved from Super I/O registers
46 * Winbond W83667HG-B
50 Addresses scanned: ISA address retrieved from Super I/O registers
54 * Nuvoton NCT6775F/W83667HG-I
58 Addresses scanned: ISA address retrieved from Super I/O registers
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H A Dfam15h_power.rst12 Addresses scanned: PCI space
16 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors
17 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 16h Processors
18 - AMD64 Architecture Programmer's Manual Volume 2: System Programming
23 -----------
55 On multi-node processors the calculated value is for the entire
57 attributes only for internal node0 of a multi-node processor.
67 compute unit power accumulator sample period
76 the ratio of compute unit power accumulator sample period to the
80 max compute unit accumulated power which is indicated by
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H A Dw83791d.rst10 Addresses scanned: I2C 0x2c - 0x2f
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83791D_W83791Gb.pdf
22 - Frodo Looijaard <frodol@dds.nl>,
23 - Philip Edelbrock <phil@netroedge.com>,
24 - Mark Studebaker <mdsxyz123@yahoo.com>
28 - Shane Huang (Winbond),
29 - Rudolf Marek <r.marek@assembler.cz>
33 - Sven Anders <anders@anduras.de>
34 - Marc Hulsman <m.hulsman@tudelft.nl>
37 -----------------
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/linux/include/uapi/linux/genwqe/
H A Dgenwqe_card.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
11 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
26 * User-space API for the GenWQE card. For debugging and test purposes
27 * the register addresses are included here too.
36 #define GENWQE_TYPE_ALTERA_230 0x00 /* GenWQE4 Stratix-IV-230 */
37 #define GENWQE_TYPE_ALTERA_530 0x01 /* GenWQE4 Stratix-IV-530 */
38 #define GENWQE_TYPE_ALTERA_A4 0x02 /* GenWQE5 A4 Stratix-V-A4 */
39 #define GENWQE_TYPE_ALTERA_A7 0x03 /* GenWQE5 A7 Stratix-V-A7 */
41 /* MMIO Unit offsets: Each UnitID occupies a defined address range */
57 /* UnitID 0: Service Layer Unit (SLU) */
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/linux/arch/mips/cavium-octeon/
H A Docteon-memcpy.S18 #include <asm/asm-offsets.h>
30 * - src and dst don't overlap
31 * - src is readable
32 * - dst is writable
40 * - src is readable (no exceptions when reading src)
42 * - dst is writable (no exceptions when writing dst)
43 * __copy_user uses a non-standard calling convention; see
57 * 1- AT contain the address of the byte just past the end of the source
59 * 2- src_entry <= src < AT, and
60 * 3- (dst - src) == (dst_entry - src_entry),
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/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-catu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-catu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm Coresight Address Translation Unit (CATU)
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The CoreSight Address Translation Unit (CATU) translates addresses between an
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/linux/tools/perf/pmu-events/arch/x86/grandridge/
H A Duncore-cache.json9 "Unit": "CHACMS" string
19 "Unit": "CHACMS" string
28 "Unit": "CHA" string
38 "Unit": "CHA" string
47 "Unit": "CHA" string
56 "Unit": "CHA" string
59 …"BriefDescription": "Counts when a normal (Non-Isochronous) full line write is issued from the CHA…
66 "Unit": "CHA" string
76 "Unit": "CHA" string
79 …"BriefDescription": "CHA to iMC Full Line Writes Issued : Partial Non-ISOCH : Counts the total num…
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/linux/arch/powerpc/platforms/44x/
H A Dfsp2.h33 #define PLB4OPB_GESR0 0x0 /* Error status 0: Master Dev 0-3 */
36 #define PLB4OPB_GESR1 0x4 /* Error Status 1: Master Dev 4-7 */
37 #define PLB4OPB_GESR2 0xC /* Error Status 2: Master Dev 8-11 */
39 /* PLB4-to-AHB Bridge */
54 /* PLB4-to-PLB6 Bridge */
60 /* PLB6-to-PLB4 Bridge */
66 /* PLB6-to-MCIF Bridge */
82 /* L2 indirect addresses */
164 /* PLB-Attached DDR3/4 Core Wrapper */
190 /* CMU addresses */
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/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-memory.json8 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu…
11 "Unit": "iMC" string
19 … "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.…
22 "Unit": "iMC" string
32 "Unit": "iMC" string
43 "Unit": "iMC" string
53 "Unit": "iMC" string
61 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu…
63 "Unit": "iMC" string
66 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
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/linux/Documentation/filesystems/ext4/
H A Dbigalloc.rst1 .. SPDX-License-Identifier: GPL-2.0
4 --------
7 supported page size on most MMU-capable hardware. This is fortunate, as
16 bitmap addresses a power of two number of blocks. For example, if the
17 file system is mainly going to be storing large files in the 4-32
19 This means that each bit in the block allocation bitmap now addresses
22 means that a block group addresses 32 gigabytes instead of 128 megabytes,
29 128MiB); however, the minimum allocation unit becomes a cluster, not a
32 not clear where those patches went-- they eventually morphed into
/linux/Documentation/networking/devlink/
H A Dmv88e6xxx.rst1 .. SPDX-License-Identifier: GPL-2.0
13 The ``mv88e6xxx`` driver implements the following driver-specific parameters.
15 .. list-table:: Driver-specific parameters implemented
18 * - Name
19 - Type
20 - Mode
21 - Description
22 * - ``ATU_hash``
23 - u8
24 - runtime
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/linux/drivers/net/dsa/mv88e6xxx/
H A Dphy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_read()
35 return -EOPNOTSUPP; in mv88e6xxx_phy_read()
37 if (!chip->info->ops->phy_read) in mv88e6xxx_phy_read()
38 return -EOPNOTSUPP; in mv88e6xxx_phy_read()
40 return chip->info->ops->phy_read(chip, bus, addr, reg, val); in mv88e6xxx_phy_read()
45 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_write()
50 return -EOPNOTSUPP; in mv88e6xxx_phy_write()
52 if (!chip->info->ops->phy_write) in mv88e6xxx_phy_write()
53 return -EOPNOTSUPP; in mv88e6xxx_phy_write()
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/linux/sound/firewire/tascam/
H A Dtascam.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tascam.c - a part of driver for TASCAM FireWire series
11 MODULE_AUTHOR("Takashi Sakamoto <o-takashi@sakamocchi.jp>");
16 .name = "FW-1884",
25 .name = "FW-1082",
34 .name = "FW-1804",
46 struct fw_device *fw_dev = fw_parent_device(tscm->uni in identify_model()
98 snd_tscm_probe(struct fw_unit * unit,const struct ieee1394_device_id * entry) snd_tscm_probe() argument
155 snd_tscm_update(struct fw_unit * unit) snd_tscm_update() argument
166 snd_tscm_remove(struct fw_unit * unit) snd_tscm_remove() argument
[all...]
/linux/mm/damon/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 for performance-centric DRAM level memory management.
22 For more information on KUnit and unit tests in general, please refer
50 This builds the DAMON virtual addresses operations Kunit test suite.
52 For more information on KUnit and unit tests in general, please refer
72 For more information on KUnit and unit tests in general, please refer
78 bool "Build DAMON-based reclaim (DAMON_RECLAIM)"
81 This builds the DAMON-based reclamation subsystem. It finds pages
87 scanning-based reclamation is used for heavy pressure.
90 bool "Build DAMON-based LRU-lists sorting (DAMON_LRU_SORT)"
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/linux/sound/firewire/bebob/
H A Dbebob.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * bebob.h - a part of driver for BeBoB based devices
5 * Copyright (c) 2013-2014 Takashi Sakamoto
14 #include <linux/firewire-constants.h>
32 #include "../packets-buffer.h"
33 #include "../iso-resources.h"
34 #include "../amdtp-am824.h"
37 /* basic register addresses on DM1000/DM1100/DM1500 */
85 struct fw_unit *unit; member
115 /* for M-Audio special devices */
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/linux/drivers/crypto/
H A Dtalitos.h1 /* SPDX-License-Identifier: BSD-3-Clause */
5 * Copyright (c) 2006-2011 Freescale Semiconductor, Inc.
43 #define TALITOS_DESC_SIZE (sizeof(struct talitos_desc) - sizeof(__be32))
46 * talitos_edesc - s/w-extended descriptor
74 * talitos_request - descriptor submission request
88 /* per-channel fifo management */
105 /* index to next in-progress/done descriptor request */
174 return priv->features & TALITOS_FTR_SEC1; in has_ftr_sec1()
180 * TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
186 /* global register offset addresses */
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/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78230.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
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/linux/Documentation/arch/riscv/
H A Dboot.rst1 .. SPDX-License-Identifier: GPL-2.0
4 RISC-V Kernel Boot Requirements and Constraints
10 This document describes what the RISC-V kernel expects from bootloaders and
16 Pre-kernel Requirements and Constraints
19 The RISC-V kernel expects the following of bootloaders and platform firmware:
22 --------------
24 The RISC-V kernel expects:
30 ---------
32 The RISC-V kernel expects:
37 -------------------------------------
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/linux/arch/m68k/include/asm/
H A Dm523xsim.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * m523xsim.h -- ColdFire 523x System Integration Module support.
7 * (C) Copyright 2003-2005, Greg Ungerer <gerg@snapgear.com>
22 * Define the 523x SIM register set addresses.
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
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/linux/Documentation/devicetree/bindings/display/
H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A Duncore-memory.json3 "BriefDescription": "Cycles - at UCLK",
8 "Unit": "M2HBM" string
16 "Unit": "M2HBM" string
26 "Unit": "M2HBM" string
37 "Unit": "M2HBM" string
46 "Unit": "M2HBM" string
56 "Unit": "M2HBM" string
66 "Unit": "M2HBM" string
76 "Unit": "M2HBM" string
86 "Unit": "M2HBM" string
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/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Duncore-memory.json3 "BriefDescription": "Cycles - at UCLK",
8 "Unit": "M2HBM" string
16 "Unit": "M2HBM" string
26 "Unit": "M2HBM" string
37 "Unit": "M2HBM" string
46 "Unit": "M2HBM" string
56 "Unit": "M2HBM" string
66 "Unit": "M2HBM" string
76 "Unit": "M2HBM" string
86 "Unit": "M2HBM" string
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