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Searched +full:uniphier +full:- +full:pxs3 +full:- +full:ahci +full:- +full:reset (Results 1 – 6 of 6) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/soc/socionext/
H A Dsocionext,uniphier-ahci-glue.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC AHCI glue layer
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
14 logic handling signals to AHCI host controller inside AHCI component.
19 - enum:
20 - socionext,uniphier-pro4-ahci-glue
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Duniphier-reset.txt1 UniPhier glue reset controller
4 Peripheral core reset in glue layer
5 -----------------------------------
7 Some peripheral core reset belongs to its own glue layer. Before using
8 this core reset, it is necessary to control the clocks and resets to enable
12 - compatible: Should be
13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
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H A Dsocionext,uniphier-glue-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral core reset in glue layer
10 Some peripheral core reset belongs to its own glue layer. Before using
11 this core reset, it is necessary to control the clocks and resets to
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-reset
22 - socionext,uniphier-pro5-usb3-reset
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/socionext/
H A Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs3 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dsocionext,uniphier-ahci-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier AHCI PHY
11 AHCI controller implemented on Socionext UniPhier SoCs.
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pro4-ahci-phy
20 - socionext,uniphier-pxs2-ahci-phy
21 - socionext,uniphier-pxs3-ahci-phy
[all …]
/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dahci-platform.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AHCI SATA Controller
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
13 It is possible, but not required, to represent each port as a sub-node.
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
26 - brcm,iproc-ahci
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