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/linux/drivers/clk/imx/
H A Dclk-imx31.c46 uart4_gate, uart5_gate, owire_gate, ssi2_gate, cspi1_gate, cspi2_gate, enumerator
105 clk[uart5_gate] = imx_clk_gate2("uart5_gate", "per", base + MXC_CCM_CGR1, 28); in _mx31_clocks_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx31-clock.yaml69 uart5_gate 50
/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h160 #define UART5_GATE 145 macro
/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1.dtsi291 clocks = <&clk UART5_GATE>;
/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1.c815 hws[UART5_GATE] = ma35d1_clk_gate(dev, "uart5_gate", "uart5_div", in ma35d1_clocks_probe()
/linux/drivers/clk/nxp/
H A Dclk-lpc32xx.c1305 LPC32XX_DEFINE_GATE(UART5_GATE, UART_CLK_CTRL, 2, 0),
1306 LPC32XX_DEFINE_COMPOSITE(UART5, UART5_MUX, UART5_DIV, UART5_GATE),