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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-370-pinctrl.txt21 mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk)
25 mpp9 9 gpo, ge0(txd3), uart1(txd), sd0(clk), audio(spdifo)
27 mpp11 11 gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
37 mpp16 16 gpio, ge0(rxclk), uart1(rxd), tdm(int), audio(extclk)
42 mpp21 21 gpo, ge0(txd5), ge1(txd1), uart1(txd)
46 mpp25 25 gpio, ge0(rxerr), ge1(rxd0), uart1(rxd)
59 mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts)
61 mpp40 40 gpio, dev(ad1), uart1(rts), uart0(rts)
62 mpp41 41 gpio, dev(ad2), uart1(rxd)
63 mpp42 42 gpo, dev(ad3), uart1(txd)
[all …]
H A Dmarvell,kirkwood-pinctrl.txt32 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
34 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
40 mpp13 13 gpio, sdio(cmd), uart1(txd)
41 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
42 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd)
43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
70 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
72 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
78 mpp13 13 gpio, sdio(cmd), uart1(txd)
79 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
[all …]
H A Dmarvell,orion-pinctrl.txt65 mpp16 16 uart1(rxd), ge(rxd4), gpio
66 mpp17 17 uart1(txd), ge(rxd5), gpio
67 mpp18 18 uart1(cts), ge(rxd6), gpio
68 mpp19 19 uart1(rts), ge(rxd7), gpio
90 mpp16 16 uart1(rxd), ge(rxd4)
91 mpp17 17 uart1(txd), ge(rxd5)
92 mpp18 18 uart1(cts), ge(rxd6)
93 mpp19 19 uart1(rts), ge(rxd7)
H A Dmarvell,armada-375-pinctrl.txt30 mpp14 14 gpio, i2c0(sda), uart1(txd)
31 mpp15 15 gpio, i2c0(sck), uart1(rxd)
42 mpp26 26 gpio, pcie0(clkreq), ge1(rxd2), sd(d2), uart1(rts)
43 mpp27 27 gpio, pcie1(clkreq), ge1(rxd3), sd(d1), uart1(cts)
56 mpp40 40 gpio, uart1(txd)
57 mpp41 41 gpio, uart1(rxd)
76 mpp60 60 gpio, uart1(txd), led(c2)
77 mpp61 61 gpio, i2c1(sda), uart1(rxd), spi1(cs2), led(p0)
H A Dmarvell,armada-98dx3236-pinctrl.txt25 mpp11 11 gpio, uart1(rxd), uart0(cts), dev(ad13)
26 mpp12 12 gpo, uart1(txd), uart0(rts), dev(ad14)
32 mpp18 18 gpio, uart1(txd)
33 mpp19 19 gpio, uart1(rxd), dev(rb)
H A Dmediatek,mt76x8-pinctrl.yaml42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
239 enum: [uart1, uart2]
356 enum: [uart1]
370 const: uart1
374 enum: [uart1]
H A Dmarvell,dove-pinctrl.txt21 uart1(rts), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
47 uart1(cts), ssp(sfrm)
49 lcd-spi(mosi), uart1(cts), ssp(txd)
58 mpp_uart1 62-63 gpio, uart1
H A Dmediatek,mt7621-pinctrl.yaml40 uart1, uart2, uart3, wdt refclk, wdt rst]
60 uart1, uart2, uart3, wdt]
200 const: uart1
204 enum: [uart1]
H A Dralink,mt7621-pinctrl.yaml37 uart1, uart2, uart3, wdt refclk, wdt rst]
57 uart1, uart2, uart3, wdt]
197 const: uart1
201 enum: [uart1]
H A Dmarvell,mvebu-pinctrl.txt28 uart1: serial@12100 {
42 pmx_uart1_sw: pmx-uart1-sw {
44 marvell,function = "uart1";
H A Dbrcm,bcm6358-pinctrl.yaml31 enum: [ ebi_cs, uart1, serial_led, legacy_led, led, spi_cs, utopia,
58 pinctrl_uart1: uart1-pins {
59 function = "uart1";
H A Dralink,mt7620-pinctrl.yaml47 spis, sw_r, uart0, uart1, uart2, utif, wdt, wled_an, wled_kn, -]
102 sdmode, spi, spi cs1, spis, uart0, uart1, uart2,
357 enum: [uart1, uart2]
515 enum: [uart1]
529 const: uart1
533 enum: [uart1]
/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dcp110-system-controller.txt93 mpp2 2 gpio, dev(ad15), au(i2sextclk), ge0(rxd1), tdm(dtx), mss_uart(rxd), ptp(pclk_out), i2c1(sck), uart1(rxd), sata0(present_act), xg(mdc)
94 mpp3 3 gpio, dev(ad14), au(i2slrclk), ge0(rxd0), tdm(fsync), mss_uart(txd), pcie(rstoutn), i2c1(sda), uart1(txd), sata1(present_act), xg(mdio)
95 mpp4 4 gpio, dev(ad13), au(i2sbclk), ge0(rxctl), tdm(rstn), mss_uart(rxd), uart1(cts), pcie0(clkreq), uart3(rxd), ge(mdc)
96 mpp5 5 gpio, dev(ad12), au(i2sdi), ge0(rxclk), tdm(intn), mss_uart(txd), uart1(rts), pcie1(clkreq), uart3(txd), ge(mdio)
131 mpp40 40 gpio, sdio(pwr11), synce1(clk), mss_i2c(sda), au(i2sdo_spdifo), ptp(pclk_out), spi0(clk), uart1(txd), ge(mdio), sata0(present_act), mss_gpio1
132 mpp41 41 gpio, sdio(pwr10), sdio(bus_pwr), mss_i2c(sck), au(i2slrclk), ptp(pulse), spi0(mosi), uart1(rxd), ge(mdc), sata1(present_act), mss_gpio2, rei(out_cp2cp)
133 mpp42 42 gpio, sdio(v18_en), sdio(wr_protect), synce2(clk), au(i2smclk), mss_uart(txd), spi0(miso), uart1(cts), xg(mdc), sata0(present_act), mss_gpio4
134 mpp43 43 gpio, sdio(card_detect), synce1(clk), au(i2sextclk), mss_uart(rxd), spi0(csn0), uart1(rts), xg(mdio), sata1(present_act), mss_gpio5, wakeup(out_cp2cp)
137 mpp46 46 gpio, ge1(txd1), uart1(rts)
138 mpp47 47 gpio, ge1(txd0), spi1(clk), uart1(tx
[all...]
/freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Dk210-fpioa.h78 #define K210_PCF_UART1_RX 64 /* UART1 Receiver */
79 #define K210_PCF_UART1_TX 65 /* UART1 Transmitter */
162 #define K210_PCF_UART1_CTS 148 /* UART1 Clear To Send */
163 #define K210_PCF_UART1_DSR 149 /* UART1 Data Set Ready */
164 #define K210_PCF_UART1_DCD 150 /* UART1 Data Carrier Detect */
165 #define K210_PCF_UART1_RI 151 /* UART1 Ring Indicator */
166 #define K210_PCF_UART1_SIR_IN 152 /* UART1 Serial Infrared Input */
167 #define K210_PCF_UART1_DTR 153 /* UART1 Data Terminal Ready */
168 #define K210_PCF_UART1_RTS 154 /* UART1 Request To Send */
169 #define K210_PCF_UART1_OUT2 155 /* UART1 User-designated Output 2 */
[all …]
/freebsd/sys/riscv/allwinner/
H A Dd1_padconf.c44 …{ "PB8", 1, 8, { "gpio_in", "gpio_out", "dmic", "pwm5", "i2c2", "spi1", "uart0", "uart1", NU…
45 …{ "PB9", 1, 9, { "gpio_in", "gpio_out", "dmic", "pwm6", "i2c2", "spi1", "uart0", "uart1", NU…
46 …{ "PB10", 1, 10, { "gpio_in", "gpio_out", "dmic", "pwm7", "i2c0", "spi1", "clk", "uart1", NU…
47 …{ "PB11", 1, 11, { "gpio_in", "gpio_out", "dmic", "pwm2", "i2c0", "spi1", "clk", "uart1", NU…
78 …{ "PD21", 3, 21, { "gpio_in", "gpio_out", "lcd0", "i2c2", "uart1", "pwm5", NULL, NULL, NU…
79 …{ "PD22", 3, 22, { "gpio_in", "gpio_out", "spdif", "ir", "uart1", "pwm7", NULL, NULL, NU…
88 …{ "PE8", 4, 8, { "gpio_in", "gpio_out", "ncsi0", "uart1", "pwm2", "uart3", "jtag", NULL, "e…
89 …{ "PE9", 4, 9, { "gpio_in", "gpio_out", "ncsi0", "uart1", "pwm3", "uart3", "jtag", NULL, "e…
90 …{ "PE10", 4, 10, { "gpio_in", "gpio_out", "ncsi0", "uart1", "pwm4", "ir", "jtag", NULL, "e…
91 …{ "PE11", 4, 11, { "gpio_in", "gpio_out", "ncsi0", "uart1", "i2s0", "i2s0", "jtag", NULL, "e…
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
16 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
17 * pins, see uart1 and usdhc3 node below.
70 &uart1 {
73 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
120 * I: uart1 rts
121 * M: uart1 cts
/freebsd/sys/dts/arm/
H A Defikamx.dts68 /* UART1, console */
69 UART1: serial@73fbc000 { label
116 UART1 = &UART1;
122 stdin = "UART1";
123 stdout = "UART1";
H A Dzedboard.dts41 stdin = &uart1;
42 stdout = &uart1;
54 &uart1 {
H A Dzybo.dts41 stdin = &uart1;
42 stdout = &uart1;
54 &uart1 {
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d3_uart.dtsi17 serial6 = &uart1;
31 uart1 {
32 pinctrl_uart1: uart1-0 {
52 uart1: serial@f8028000 { label
/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-ebaz4205.dts14 serial0 = &uart1;
105 pinctrl_uart1_default: uart1-default {
108 function = "uart1";
140 &uart1 {
/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Demev2-kzm9d.dts24 serial1 = &uart1;
105 uart1_pins: uart1 {
107 function = "uart1";
111 &uart1 {
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Dcu1830-neo.dts14 serial1 = &uart1;
61 &uart1 {
189 pins_uart1: uart1 {
190 function = "uart1";
191 groups = "uart1-data";
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dcirrus,clps711x-intc.txt24 12: UTXINT1 UART1 transmit FIFO half empty
25 13: URXINT1 UART1 receive FIFO half full
26 14: UMSINT UART1 modem status changed
/freebsd/sys/arm/allwinner/a33/
H A Da33_padconf.c70 {"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", "uart1", NULL, NULL, NULL, NULL}},
71 {"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", "uart1", NULL, NULL, NULL, NULL}},
72 {"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", "uart1", NULL, NULL, NULL, NULL}},
73 {"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", "uart1", NULL, NULL, NULL, NULL}},
119 {"PG6", 6, 6, {"gpio_in", "gpio_out", "uart1", NULL, "pg_eint6", NULL}, 4, 6, 6},
120 {"PG7", 6, 7, {"gpio_in", "gpio_out", "uart1", NULL, "pg_eint7", NULL}, 4, 7, 6},
121 {"PG8", 6, 8, {"gpio_in", "gpio_out", "uart1", NULL, "pg_eint8", NULL}, 4, 8, 6},
122 {"PG9", 6, 9, {"gpio_in", "gpio_out", "uart1", NULL, "pg_eint9", NULL}, 4, 9, 6},

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