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Searched full:txc (Results 1 – 25 of 113) sorted by relevance

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/freebsd/tools/tools/ath/athalq/
H A Dar9300_ds.c150 struct ar9300_txc txc; in ar9300_decode_txdesc() local
153 memcpy(&txc, &a->payload, 96); in ar9300_decode_txdesc()
159 (unsigned int) MS(txc.ds_ctl10, AR_tx_desc_id)); in ar9300_decode_txdesc()
162 txc.ds_info & 0xff, in ar9300_decode_txdesc()
163 MS(txc.ds_info, AR_tx_qcu_num), in ar9300_decode_txdesc()
164 MS(txc.ds_info, AR_ctrl_stat), in ar9300_decode_txdesc()
165 MS(txc.ds_info, AR_desc_id)); in ar9300_decode_txdesc()
168 printf(" Link 0x%08x\n", txc.ds_link); in ar9300_decode_txdesc()
172 txc.ds_data0, in ar9300_decode_txdesc()
173 MS(txc.ds_ctl3, AR_buf_len)); in ar9300_decode_txdesc()
[all …]
H A Dar5416_ds.c123 struct ar5416_desc txc; in ar5416_decode_txdesc() local
126 memcpy(&txc, &a->payload, sizeof(struct ar5416_desc)); in ar5416_decode_txdesc()
134 txc.ds_link, in ar5416_decode_txdesc()
135 txc.ds_data); in ar5416_decode_txdesc()
139 txc.ds_ctl0 & AR_FrameLen, in ar5416_decode_txdesc()
140 MF(txc.ds_ctl0, AR_VirtMoreFrag)); in ar5416_decode_txdesc()
142 MS(txc.ds_ctl0, AR_XmitPower), in ar5416_decode_txdesc()
143 MF(txc.ds_ctl0, AR_RTSEnable), in ar5416_decode_txdesc()
144 MF(txc.ds_ctl0, AR_VEOL), in ar5416_decode_txdesc()
145 MF(txc.ds_ctl0, AR_ClrDestMask)); in ar5416_decode_txdesc()
[all …]
H A Dar5416_ds_tdma.c126 struct ar5416_desc txc; in ar5416_decode_txdesc() local
129 memcpy(&txc, &a->payload, sizeof(struct ar5416_desc)); in ar5416_decode_txdesc()
137 txc.ds_link, in ar5416_decode_txdesc()
138 txc.ds_data); in ar5416_decode_txdesc()
142 txc.ds_ctl0 & AR_FrameLen, in ar5416_decode_txdesc()
143 MF(txc.ds_ctl0, AR_VirtMoreFrag)); in ar5416_decode_txdesc()
145 MS(txc.ds_ctl0, AR_XmitPower), in ar5416_decode_txdesc()
146 MF(txc.ds_ctl0, AR_RTSEnable), in ar5416_decode_txdesc()
147 MF(txc.ds_ctl0, AR_VEOL), in ar5416_decode_txdesc()
148 MF(txc.ds_ctl0, AR_ClrDestMask)); in ar5416_decode_txdesc()
[all …]
H A Dar5212_ds.c82 struct ar5212_desc txc; in ar5212_decode_txdesc() local
85 memcpy(&txc, &a->payload, sizeof(struct ar5212_desc)); in ar5212_decode_txdesc()
93 txc.ds_link, in ar5212_decode_txdesc()
94 txc.ds_data); in ar5212_decode_txdesc()
97 printf(" Frame Len=%d\n", txc.ds_ctl0 & AR_FrameLen); in ar5212_decode_txdesc()
99 MS(txc.ds_ctl0, AR_XmitPower), in ar5212_decode_txdesc()
100 MF(txc.ds_ctl0, AR_RTSCTSEnable), in ar5212_decode_txdesc()
101 MF(txc.ds_ctl0, AR_VEOL), in ar5212_decode_txdesc()
102 MF(txc.ds_ctl0, AR_ClearDestMask), in ar5212_decode_txdesc()
103 MF(txc.ds_ctl0, AR_AntModeXmit)); in ar5212_decode_txdesc()
[all …]
H A Dar5210_ds.c75 struct ar5210_desc txc; in ar5210_decode_txdesc() local
78 memcpy(&txc, &a->payload, sizeof(struct ar5210_desc)); in ar5210_decode_txdesc()
86 txc.ds_link, in ar5210_decode_txdesc()
87 txc.ds_data); in ar5210_decode_txdesc()
90 printf(" Frame Len=%d\n", txc.ds_ctl0 & AR_FrameLen); in ar5210_decode_txdesc()
92 MS(txc.ds_ctl0, AR_XmitRate), in ar5210_decode_txdesc()
93 MF(txc.ds_ctl0, AR_RTSCTSEnable), in ar5210_decode_txdesc()
94 MF(txc.ds_ctl0, AR_ClearDestMask), in ar5210_decode_txdesc()
95 MF(txc.ds_ctl0, AR_AntModeXmit)); in ar5210_decode_txdesc()
97 MS(txc.ds_ctl0, AR_FrmType), in ar5210_decode_txdesc()
[all …]
H A Dar5211_ds.c76 struct ar5211_desc txc; in ar5211_decode_txdesc() local
79 memcpy(&txc, &a->payload, sizeof(struct ar5211_desc)); in ar5211_decode_txdesc()
87 txc.ds_link, in ar5211_decode_txdesc()
88 txc.ds_data); in ar5211_decode_txdesc()
91 printf(" Frame Len=%d\n", txc.ds_ctl0 & AR_FrameLen); in ar5211_decode_txdesc()
93 MS(txc.ds_ctl0, AR_XmitRate), in ar5211_decode_txdesc()
94 MF(txc.ds_ctl0, AR_RTSCTSEnable), in ar5211_decode_txdesc()
95 MF(txc.ds_ctl0, AR_VEOL), in ar5211_decode_txdesc()
96 MF(txc.ds_ctl0, AR_ClearDestMask), in ar5211_decode_txdesc()
97 MF(txc.ds_ctl0, AR_AntModeXmit)); in ar5211_decode_txdesc()
[all …]
/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_fm.h54 #define ERNAME_TXC_ROECC_ADDR "txc reorder FIFO ECC error address"
55 #define ERNAME_TXC_ROECC_DATA0 "txc reorder FIFO data0"
56 #define ERNAME_TXC_ROECC_DATA1 "txc reorder FIFO data1"
57 #define ERNAME_TXC_ROECC_DATA2 "txc reorder FIFO data2"
58 #define ERNAME_TXC_ROECC_DATA3 "txc reorder FIFO data3"
59 #define ERNAME_TXC_ROECC_DATA4 "txc reorder FIFO data4"
60 #define ERNAME_TXC_RO_STATE0 "txc reorder FIFO error state0" \
62 #define ERNAME_TXC_RO_STATE1 "txc reorder FIFO error state1" \
64 #define ERNAME_TXC_RO_STATE2 "txc reorder FIFO error state2" \
66 #define ERNAME_TXC_RO_STATE3 "txc reorder FIFO error state3"
[all …]
/illumos-gate/usr/src/man/man8/
H A Dsyncinit.842 …o other clocking options have been specified, perform the equivalent of \fBtxc=baud\fR and \fBrxc=…
45 …other clocking options have been specified, perform the equivalent of \fBtxc=txc\fR and \fBrxc=rxc…
57 \fBtxc\fR \fBtxc\fR T{
58 Transmit clock source will be the \fBTxC\fR signal (pin 15).
72 \fBtxc\fR T{
73 Receive clock source will be the \fBTxC\fR signal (pin 15).
97 \fBexternal\fR \fBtxc=txc rxc=rxc loop=no\fR
98 \fBsender\fR \fBtxc=baud rxc=rxc loop=no\fR
99 \fBinternal\fR \fBtxc=pll rxc=pll loop=no\fR
115 speed=38400, loopback=yes, echo=no, nrzi=no, txc=baud, rxc=baud
[all …]
/freebsd/sys/dev/aq/
H A Daq_ring.c409 …tic int aq_ring_tso_setup(aq_dev_t *aq_dev, if_pkt_info_t pi, uint32_t *hdrlen, aq_txc_desc_t *txc) in aq_ring_tso_setup() argument
424 txc->cmd = 0x4; /* TCP */ in aq_ring_tso_setup()
427 txc->cmd |= 0x2; in aq_ring_tso_setup()
429 txc->l2_len = pi->ipi_ehdrlen; in aq_ring_tso_setup()
430 txc->l3_len = pi->ipi_ip_hlen; in aq_ring_tso_setup()
431 txc->l4_len = pi->ipi_tcp_hlen; in aq_ring_tso_setup()
432 txc->mss_len = pi->ipi_tso_segsz; in aq_ring_tso_setup()
433 *hdrlen = txc->l2_len + txc->l3_len + txc->l4_len; in aq_ring_tso_setup()
439 txc->vlan_tag = htole16(pi->ipi_vtag); in aq_ring_tso_setup()
443 txc->type = tx_desc_type_ctx; in aq_ring_tso_setup()
[all …]
/freebsd/contrib/ntp/util/
H A Dtickadj.c30 struct timex txc; variable
49 txc.time_tick = i;
50 txc.modes = ADJ_TIMETICK;
60 txc.tickadj = i;
61 txc.modes |= ADJ_TICKADJ;
76 txc.time_tick = i;
77 txc.modes |= ADJ_TIMETICK;
97 if (adjtimex(&txc) < 0)
101 txc.time_tick, txc.tickadj);
121 if ( (txc.time_tick = atoi(argv[1])) < 1 ) in main()
[all …]
/illumos-gate/usr/src/uts/common/io/nxge/npi/
H A Dnpi_txc.c29 * Transmit Controller (TXC) Functions.
128 * Dumps the contents of TXC csrs and fzc registers
169 "\n TXC FZC Register Dump for Channel %d done\n", tdc)); in npi_txc_dump_tdc_fzc_regs()
176 * Dumps the contents of txc csrs and fzc registers
202 "\n TXC FZC Common Register Dump Done \n")); in npi_txc_dump_fzc_regs()
209 * Dumps the contents of TXC csrs and fzc registers
241 "\n TXC FZC Register Dump for port %d done\n", port)); in npi_txc_dump_port_fzc_regs()
416 * This function is called to globally enable TXC.
442 * This function is called to globally disable TXC.
738 * This function is called to get the txc reorder resources.
[all …]
H A Dnpi_txc.h37 * Transmit Controller (TXC) NPI error codes
52 * Register offset (0x1000 bytes for each channel) for TXC registers.
57 * Register offset (0x100 bytes for each port) for TXC Function zero
82 * TXC (Transmit Controller) prototypes.
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_txc.c49 * Enable the TXC controller. in nxge_txc_init()
55 /* Enable this port within the TXC. */ in nxge_txc_init()
66 /* Unmask all TXC interrupts */ in nxge_txc_init()
74 "nxge_txc_init: Failed to initialize txc on port %d", in nxge_txc_init()
93 * disable the TXC controller. in nxge_txc_uninit()
99 /* disable this port within the TXC. */ in nxge_txc_uninit()
114 "nxge_txc_init: Failed to initialize txc on port %d", in nxge_txc_uninit()
165 /* Mask all TXC interrupts for <port>. */ in nxge_txc_tdc_bind()
200 * Enable the TXC controller, if necessary. in nxge_txc_tdc_bind()
208 /* Unmask all TXC interrupts on <port> */ in nxge_txc_tdc_bind()
[all …]
/illumos-gate/usr/src/cmd/cmd-inet/usr.sbin/
H A Dsyncinit.c57 "txc",
62 "-txc",
68 "txc",
187 } else if (prefix(arg, "txc")) { in main()
260 "speed=%d, loopback=%s, echo=%s, nrzi=%s, txc=%s, rxc=%s\n", in main()
276 (void) fprintf(stderr, "\t[txc=[txc|rxc|baud|pll]] \\\n"); in usage()
277 (void) fprintf(stderr, "\t[rxc=[rxc|txc|baud|pll]]\n"); in usage()
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmediatek-dwmac.txt38 Otherwise, is connected to TXC pin.
40 MT2712 SoC provides the RMII reference clock, which outputs to TXC pin only.
41 - mediatek,txc-inverse: boolean property, if present indicates that
45 3. the reference clock, which outputs to TXC pin will be inversed in RMII case
85 mediatek,txc-inverse;
H A Dmicrel-ksz90x1.txt50 - txc-skew-ps : Skew control of TXC pad
74 The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
138 - txc-skew-ps : Skew control of TX clock pad
172 - txc-skew-psec : Skew control of TX clock pad
193 txc-skew-ps = <1800>;
203 txc-skew-ps = <1800>;
H A Dmediatek,star-emac.yaml55 PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
62 mediatek,txc-inverse:
65 If present, indicates that clock on TXC pad will be inversed.
H A Dmediatek-dwmac.yaml106 PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
112 outputs to TXC pin only.
114 mediatek,txc-inverse:
121 3. the reference clock, which outputs to TXC pin will be inversed in RMII case
H A Daltr,socfpga-stmmac.yaml98 txc-skew-ps:
99 description: Skew control of TXC pad
102 description: Skew control of TXC pad
/freebsd/sys/dev/vmware/vmxnet3/
H A Dif_vmx.c757 struct vmxnet3_comp_ring *txc; in vmxnet3_init_txq() local
762 txc = &txq->vxtxq_comp_ring; in vmxnet3_init_txq()
771 txc->vxcr_ndesc = scctx->isc_ntxd[0]; in vmxnet3_init_txq()
818 struct vmxnet3_comp_ring *txc; in vmxnet3_tx_queues_alloc() local
821 txc = &txq->vxtxq_comp_ring; in vmxnet3_tx_queues_alloc()
825 txc->vxcr_u.txcd = in vmxnet3_tx_queues_alloc()
827 txc->vxcr_paddr = paddrs[q * ntxqs + 0]; in vmxnet3_tx_queues_alloc()
1394 struct vmxnet3_comp_ring *txc; in vmxnet3_isc_txd_credits_update() local
1401 txc = &txq->vxtxq_comp_ring; in vmxnet3_isc_txd_credits_update()
1412 txcd = &txc->vxcr_u.txcd[txc->vxcr_next]; in vmxnet3_isc_txd_credits_update()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d3xmb_gmac.dtsi22 txc-skew-ps = <3000>;
36 txc-skew-ps = <3000>;
/freebsd/sys/dev/ste/
H A Dif_ste.c1117 struct ste_chain *txc; in ste_dma_alloc() local
1259 txc = &sc->ste_cdata.ste_tx_chain[i]; in ste_dma_alloc()
1260 txc->ste_ptr = NULL; in ste_dma_alloc()
1261 txc->ste_mbuf = NULL; in ste_dma_alloc()
1262 txc->ste_next = NULL; in ste_dma_alloc()
1263 txc->ste_phys = 0; in ste_dma_alloc()
1264 txc->ste_map = NULL; in ste_dma_alloc()
1266 &txc->ste_map); in ste_dma_alloc()
1302 struct ste_chain *txc; in ste_dma_free() local
1309 txc = &sc->ste_cdata.ste_tx_chain[i]; in ste_dma_free()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2ul-smarc-som.dtsi83 txc-skew-psec = <2400>;
111 txc-skew-psec = <2400>;
143 txc {
173 txc {
H A Drzg3s-smarc-som.dtsi103 txc-skew-psec = <0>;
128 txc-skew-psec = <0>;
228 txc {
271 txc {
H A Drzg3e-smarc-som.dtsi132 txc-skew-psec = <1400>;
153 txc-skew-psec = <1400>;
170 pinmux = <RZG3E_PORT_PINMUX(B, 1, 1)>; /* TXC */
194 pinmux = <RZG3E_PORT_PINMUX(E, 1, 1)>; /* TXC */

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