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/linux/Documentation/networking/device_drivers/ethernet/huawei/
H A Dhinic.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
14 Some HiNIC devices support SR-IOV. This driver is used for Physical Function
17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
28 19e5:1822 - HiNIC PF
34 hinic_dev - Implement a Logical Network device that is independent from
37 hinic_hwdev - Implement the HW details of the device and include the components
55 Asynchronous Event Queues(AEQs) - The event queues for receiving messages from
58 Application Programmable Interface commands(API CMD) - Interface for sending
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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00queue.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
21 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
23 * 2432 makes sense since it is big enough to contain the maximum fragment
24 * size according to the ieee802.11 specs.
42 * @QID_OTHER: None of the above (don't use, only present for completeness)
43 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
44 * @QID_ATIM: Atim queue (value unspecified, don't send it to device)
63 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
67 * don't try to pass it back.
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_lib.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
9 * ixgbe_cache_ring_dcb_sriov - Descriptor ring to register mapping for SR-IOV
10 * @adapter: board private structure to initialize
12 * Cache the descriptor ring offsets for SR-IOV to the assigned rings. It
13 * will also try to cache the proper offsets if RSS/FCoE are enabled along
20 struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; in ixgbe_cache_ring_dcb_sriov()
22 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; in ixgbe_cache_ring_dcb_sriov()
25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov()
32 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) in ixgbe_cache_ring_dcb_sriov()
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H A Dixgbe_dcb_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
11 * @hw: pointer to hardware structure
16 * @prio_tc: priority to tc assignments indexed by priority
39 /* Map all traffic classes to their UP */ in ixgbe_dcb_config_rx_arbiter_82599()
70 * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
71 * @hw: pointer to hardware structure
77 * Configure Tx Descriptor Arbiter and credits for each traffic class.
88 /* Clear the per-Tx queue credits; we use per-TC instead */ in ixgbe_dcb_config_tx_desc_arbiter_82599()
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/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Didpf.rst1 .. SPDX-License-Identifier: GPL-2.0+
17 For questions related to hardware requirements, refer to the documentation
18 supplied with your Intel adapter. All hardware requirements listed apply to use
24 For information on how to identify your adapter, and for the latest Intel
25 network drivers, refer to the Intel Support website:
33 -------
42 ---------------------
43 Link messages will not be displayed to the console if the distribution is
44 restricting system messages. In order to see network driver link messages on
45 your console, set dmesg to eight by entering the following::
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/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_txrx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
31 * to achieve BufQ descriptors aligned to 32
63 /* Data vector for NOIRQ queues */
72 * queues. E.g.: If you have two buffer queues of 512 descriptors and buffers,
75 * number of buffer queues to calculate how many descriptors each buffer queue
79 * happen is that if hardware gets a chance to post more than ring wrap of
82 * be gone forever and SW has no reasonable way to tell that this has happened.
84 * still waiting for descriptor to be done, stalling forever.
88 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
92 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
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/linux/Documentation/networking/device_drivers/ethernet/freescale/
H A Ddpaa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
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/linux/Documentation/networking/device_drivers/ethernet/google/
H A Dgve.rst1 .. SPDX-License-Identifier: GPL-2.0+
9 The GVE driver binds to a single PCI device id used by the virtual
12 +--------------+----------+---------+
16 +--------------+----------+---------+
18 +--------------+----------+---------+
19 |Sub-vendor ID | `0x1AE0` | Google |
20 +--------------+----------+---------+
21 |Sub-device ID | `0x0058` | |
22 +--------------+----------+---------+
24 +--------------+----------+---------+
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/linux/drivers/net/wireless/intel/iwlegacy/
H A Dprph.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
20 * along with this program; if not, write to the Free Software
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
47 * contributors may be used to endorse or promote products derived
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
106 * processor is sleeping (e.g. for periodic power-saving shutdowns of radio).
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/linux/Documentation/devicetree/bindings/net/
H A Dsophgo,sg2044-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/sophgo,sg2044-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@gmail.com>
17 - sophgo,sg2044-dwmac
18 - sophgo,sg2042-dwmac
20 - compatible
25 - items:
26 - const: sophgo,sg2042-dwmac
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H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
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H A Dsophgo,cv1800b-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@gmail.com>
17 - sophgo,cv1800b-dwmac
19 - compatible
24 - const: sophgo,cv1800b-dwmac
25 - const: snps,dwmac-3.70a
32 - description: GMAC main clock
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/linux/arch/arm64/boot/dts/st/
H A Dstm32mp253.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&CPU_PD1>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 CPU_PD1: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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H A Dstm32mp233.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&cpu1_pd>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 cpu1_pd: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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/linux/drivers/net/wireless/ath/ath5k/
H A Dqcu.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
5 * Permission to use, copy, modify, and distribute this software for any
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
33 * Here we setup parameters for the 12 available TX queues. Note that
35 * basically we have 10 queues to play with. Each queue has a matching
37 * can be mapped to a single DCU that controls the various DFS parameters
38 * for the various queues. In our setup we have a 1:1 mapping between QCUs
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/linux/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dadapter.h2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
13 * Redistribution and use in source and binary forms, with or
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
62 * MSI-X interrupt index usage.
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/linux/drivers/net/ethernet/sfc/siena/
H A Dnet_driver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
61 /* Checksum generation is a per-queue option in hardware, so each
62 * queue visible to the networking core is backed by two hardware TX
63 * queues. */
68 #define EFX_TXQ_TYPE_HIGHPRI 4 /* High-priority (for TC) */
70 /* HIGHPRI is Siena-only, and INNER_CSUM is EF10, so no need for both */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
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/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dsge.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
10 * Redistribution and use in source and binary forms, with or
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
38 #include <linux/dma-mapping.h>
58 * Page chunk size for FL0 buffers if FL0 is to be populated with page chunks.
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/linux/drivers/net/ethernet/intel/ice/
H A Dice.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/dma-mapping.h>
89 #define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \
115 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
125 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
133 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
134 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
135 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
136 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
141 * use it to convert user specified BW limit into Kbps
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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
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/linux/drivers/net/ethernet/sfc/
H A Dnet_driver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
65 * queues. */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
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/linux/Documentation/networking/
H A Dnapi.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
14 The host then schedules a NAPI instance to process the events.
19 but there is an option to use :ref:`separate kernel threads<threaded>`
23 of event (packet Rx and Tx) processing.
30 of the NAPI instance while the method is the driver-specific event
31 handler. The method will typically free Tx packets that have been
37 -----------
40 from the system. The instances are attached to the netdevice passed
46 to not be invoked. napi_disable() waits for ownership of the NAPI
47 instance to be released.
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/linux/include/xen/interface/io/
H A Dnetif.h1 /* SPDX-License-Identifier: MIT */
5 * Unified network-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
19 * ring slots a skb can use. Netfront / netback may not work as
22 * A better approach is to add mechanism for netfront / netback to
24 * frontends, so we need to define a value which states the minimum
28 * (18), which is proved to work with most frontends. Any new backend
29 * which doesn't negotiate with frontend should expect frontend to
30 * send a valid packet using slots up to this value.
38 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
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/linux/drivers/net/
H A Dxen-netfront.c4 * Copyright (c) 2002-2005, K A Fraser
11 * software packages, subject to the following license:
13 * Permission is hereby granted, free of charge, to any person obtaining a copy
14 * of this source file (the "Software"), to deal in the Software without
15 * restriction, including without limitation the rights to use, copy, modify,
17 * and to permit persons to whom the Software is furnished to do so, subject to
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
67 "Maximum number of queues per virtual interface");
81 #define NETFRONT_SKB_CB(skb) ((struct netfront_cb *)((skb)->cb))
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/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-main.c1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.
17 #include "xgbe-common.h"
23 static int debug = -1;
32 DBGPR("-->xgbe_default_config\n"); in xgbe_default_config()
34 pdata->blen = DMA_SBMR_BLEN_64; in xgbe_default_config()
35 pdata->pbl = DMA_PBL_128; in xgbe_default_config()
36 pdata->aal = 1; in xgbe_default_config()
37 pdata->rd_osr_limit = 8; in xgbe_default_config()
38 pdata->wr_osr_limit = 8; in xgbe_default_config()
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