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/linux/crypto/async_tx/
H A Dasync_tx.c1 // SPDX-License-Identifier: GPL-2.0-only
37 * __async_tx_find_channel - find a channel to carry out the operation or let
46 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; in __async_tx_find_channel()
50 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask)) in __async_tx_find_channel()
51 return depend_tx->chan; in __async_tx_find_channel()
59 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
60 * pre-attached.
62 * @tx: the new operation
66 struct dma_async_tx_descriptor *tx) in async_tx_channel_switch() argument
68 struct dma_chan *chan = depend_tx->chan; in async_tx_channel_switch()
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H A Dasync_xor.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/dma-mapping.h>
21 /* do_async_xor - dma map the pages and perform the xor with an engine */
26 struct dma_device *dma = chan->device; in do_async_xor()
27 struct dma_async_tx_descriptor *tx = NULL; in do_async_xor() local
28 dma_async_tx_callback cb_fn_orig = submit->cb_fn; in do_async_xor()
29 void *cb_param_orig = submit->cb_param; in do_async_xor()
30 enum async_tx_flags flags_orig = submit->flags; in do_async_xor()
32 int src_cnt = unmap->to_cnt; in do_async_xor()
34 dma_addr_t dma_dest = unmap->addr[unmap->to_cnt]; in do_async_xor()
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H A Dasync_pq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/dma-mapping.h>
15 * struct pq_scribble_page - space to hold throwaway P or Q buffer for
22 * blocks[disks-2] and the 'Q' destination address at blocks[disks-1]
26 #define P(b, d) (b[d-2])
27 #define Q(b, d) (b[d-1])
32 * do_async_gen_syndrome - asynchronously calculate P and/or Q
41 struct dma_async_tx_descriptor *tx = NULL; in do_async_gen_syndrome() local
42 struct dma_device *dma = chan->device; in do_async_gen_syndrome()
43 enum async_tx_flags flags_orig = submit->flags; in do_async_gen_syndrome()
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/linux/drivers/peci/
H A Drequest.c1 // SPDX-License-Identifier: GPL-2.0-only
69 /* Device Specific Completion Code (CC) Definition */
90 return req->rx.buf[0]; in peci_request_data_cc()
94 * peci_request_status() - return -errno based on PECI completion code
97 * It can't be used for Ping(), GetDIB() and GetTemp() - for those commands we
100 * Return: -errno
107 dev_dbg(&req->device->dev, "ret: %#02x\n", cc); in peci_request_status()
115 return -EAGAIN; in peci_request_status()
117 return -EINVAL; in peci_request_status()
124 return -EIO; in peci_request_status()
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/linux/Documentation/ABI/testing/
H A Dsysfs-class-net-queues1 What: /sys/class/net/<iface>/queues/rx-<queue>/rps_cpus
8 network device queue. Possible values depend on the number
11 What: /sys/class/net/<iface>/queues/rx-<queue>/rps_flow_cnt
17 processed by this particular network device receive queue.
19 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
27 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
32 A Mbps max-rate set for the queue, a value of zero means disabled,
35 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
42 network device transmit queue. Possible values depend on the
45 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_rxqs
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/linux/drivers/iio/imu/
H A Dadis.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
12 #include <linux/device.h>
27 * __adis_write_reg() - write N bytes to register (unlocked version)
28 * @adis: The adis device
30 * @value: The value to write to device (up to 4 bytes)
41 .tx_buf = adis->tx, in __adis_write_reg()
45 .delay.value = adis->data->write_delay, in __adis_write_reg()
48 .tx_buf = adis->tx + 2, in __adis_write_reg()
52 .delay.value = adis->data->write_delay, in __adis_write_reg()
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/linux/Documentation/netlink/specs/
H A Dnetdev.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
9 -
11 name: xdp-act
12 render-max: true
14 -
19 -
23 -
24 name: ndo-xmit
27 -
28 name: xsk-zerocopy
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c1 // SPDX-License-Identifier: GPL-2.0
20 { TIME_SYNC, { 4, -1 }, { 0, 0 }},
21 { ONE_PPS, { -1, 5 }, { 0, 11 }},
30 { TIME_SYNC, { 4, -1 }, { 11, 0 }},
31 { ONE_PPS, { -1, 5 }, { 0, 9 }},
40 { ONE_PPS, { -1, 5 }, { 0, 1 }},
53 { GNSS, { 1, -1 }, { 0, 0 }},
55 { UFL1, { -1, 0 }, { 0, 1 }},
57 { UFL2, { 3, -1 }, { 0, 0 }},
62 return !pf->adapter ? NULL : pf->adapter->ctrl_pf; in ice_get_ctrl_pf()
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/linux/include/linux/
H A Dpeci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2018-2021 Intel Corporation */
7 #include <linux/device.h>
21 * struct peci_controller_ops - PECI controller specific methods
24 * PECI controllers may have different hardware interfaces - the drivers
33 * struct peci_controller - PECI controller
34 * @dev: device object to register PECI controller to the device model
35 * @ops: pointer to device specific controller operations
39 * PECI controllers usually connect to their drivers using non-PECI bus,
44 struct device dev;
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H A Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
8 #include <linux/device.h>
18 * typedef dma_cookie_t - an opaque DMA cookie
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
75 * @DMA_MEM_TO_DEV: Slave mode & From Memory to Device
76 * @DMA_DEV_TO_MEM: Slave mode & From Device to Memory
77 * @DMA_DEV_TO_DEV: Slave mode & From Device to Device
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/linux/include/drm/intel/
H A Di915_hdcp_interface.h1 /* SPDX-License-Identifier: (GPL-2.0+) */
3 * Copyright © 2017-2019 Intel Corporation
13 #include <linux/device.h>
17 * enum hdcp_port_type - HDCP port implementation type defined by ME/GSC FW
19 * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port
20 * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON
22 * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3)
33 * enum hdcp_wired_protocol - HDCP adaptation used on the port
57 * enum hdcp_transcoder - ME/GSC Firmware defined index for transcoders
79 * struct hdcp_port_data - intel specific HDCP port data
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/linux/drivers/net/phy/
H A Dlinkmode.c1 // SPDX-License-Identifier: GPL-2.0+
5 * linkmode_resolve_pause - resolve the allowable pause modes
15 * Local device Link partner
19 * 0 1 1 1 TX
21 * 1 X 1 X TX+RX
47 * linkmode_set_pause - set the pause mode advertisement
49 * @tx: boolean from ethtool struct ethtool_pauseparam tx_pause member
53 * capabilities of provided in @tx and @rx.
56 * tx rx Pause AsymDir
62 * Note: this translation from ethtool tx/rx notation to the advertisement
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/linux/Documentation/devicetree/bindings/net/
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
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/linux/drivers/iio/gyro/
H A Dadxrs450.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/device.h>
67 * struct adxrs450_state - device instance specific data
69 * @buf_lock: mutex to protect tx and rx
70 * @tx: transmit buffer
76 __be32 tx __aligned(IIO_DMA_MINALIGN);
82 * adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
83 * @indio_dev: device associated with child of actual iio_dev
93 u32 tx; in adxrs450_spi_read_reg_16() local
97 .tx_buf = &st->tx, in adxrs450_spi_read_reg_16()
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/linux/Documentation/networking/
H A Dtls-offload.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 For details regarding the user-facing interface refer to the TLS
18 * Software crypto mode (``TLS_SW``) - CPU handles the cryptography.
24 * Packet-based NIC offload mode (``TLS_HW``) - the NIC handles crypto
28 (``ethtool`` flags ``tls-hw-tx-offload`` and ``tls-hw-rx-offload``).
29 * Full TCP NIC offload mode (``TLS_HW_RECORD``) - mode of operation where
33 abilities or QoS and packet scheduling (``ethtool`` flag ``tls-hw-record``).
35 The operation mode is selected automatically based on device configuration,
36 offload opt-in or opt-out on per-connection basis is not currently supported.
38 TX section in Kernel TLS operation
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/linux/Documentation/networking/device_drivers/ethernet/amazon/
H A Dena.rst1 .. SPDX-License-Identifier: GPL-2.0
13 The ENA device exposes a lightweight management interface with a
17 The driver supports a range of ENA devices, is link-speed independent
21 Some ENA devices support SR-IOV. This driver is used for both the
22 SR-IOV Physical Function (PF) and Virtual Function (VF) devices.
25 processing by providing multiple Tx/Rx queue pairs (the maximum number
26 is advertised by the device via the Admin Queue), a dedicated MSI-X
27 interrupt vector per Tx/Rx queue pair, adaptive interrupt moderation,
31 checksum offload. Receive-side scaling (RSS) is supported for multi-core
35 monitoring mechanisms such as watchdog, enabling the device and driver
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/linux/drivers/dma/
H A Dvirt-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/device.h>
12 #include "virt-dma.h"
14 static struct virt_dma_desc *to_virt_desc(struct dma_async_tx_descriptor *tx) in to_virt_desc() argument
16 return container_of(tx, struct virt_dma_desc, tx); in to_virt_desc()
19 dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx) in vchan_tx_submit() argument
21 struct virt_dma_chan *vc = to_virt_chan(tx->chan); in vchan_tx_submit()
22 struct virt_dma_desc *vd = to_virt_desc(tx); in vchan_tx_submit()
26 spin_lock_irqsave(&vc->lock, flags); in vchan_tx_submit()
27 cookie = dma_cookie_assign(tx); in vchan_tx_submit()
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/linux/drivers/slimbus/
H A Dqcom-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2017, The Linux Foundation
88 /* Resource group info for manager, and non-ported generic device-components */
105 struct device *dev;
110 struct slim_ctrl_buf tx; member
125 __iowrite32_copy(ctrl->base + tx_reg, buf, count); in qcom_slim_queue_tx()
136 spin_lock_irqsave(&ctrl->rx.lock, flags); in slim_alloc_rxbuf()
137 if ((ctrl->rx.tail + 1) % ctrl->rx.n == ctrl->rx.head) { in slim_alloc_rxbuf()
138 spin_unlock_irqrestore(&ctrl->rx.lock, flags); in slim_alloc_rxbuf()
139 dev_err(ctrl->dev, "RX QUEUE full!"); in slim_alloc_rxbuf()
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/linux/drivers/platform/mellanox/
H A Dmlxbf-tmfifo.c1 // SPDX-License-Identifier: GPL-2.0+
24 #include "mlxbf-tmfifo-regs.h"
29 /* Console Tx buffer size. */
32 /* Console Tx buffer reserved space. */
35 /* House-keeping timer interval. */
50 /* Tx timeout in milliseconds. */
53 /* ACPI UID for BlueField-3. */
59 * struct mlxbf_tmfifo_vring - Structure of the TmFifo virtual ring
75 * @tx_timeout: expire time of last tx packet
101 r->desc_head == &r->drop_desc; })
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/linux/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_main.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/dma-mapping.h>
54 static int debug = -1;
73 * sxgbe_verify_args - verify the driver parameters.
86 if (!priv->tx_path_in_lpi_mode) in sxgbe_enable_eee_mode()
87 priv->hw->mac->set_eee_mode(priv->ioaddr); in sxgbe_enable_eee_mode()
93 priv->hw->mac->reset_eee_mode(priv->ioaddr); in sxgbe_disable_eee_mode()
94 del_timer_sync(&priv->eee_ctrl_timer); in sxgbe_disable_eee_mode()
95 priv->tx_path_in_lpi_mode = false; in sxgbe_disable_eee_mode()
110 mod_timer(&priv->eee_ctrl_timer, SXGBE_LPI_TIMER(eee_timer)); in sxgbe_eee_ctrl_timer()
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/linux/drivers/input/serio/
H A Dps2-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Danilo Krummrich <danilokrummrich@dk-develop.de>
24 #define DRIVER_NAME "ps2-gpio"
50 * interrupt interval should be ~60us. Let's allow +/- 20us for frequency
54 * since the device updates the data line at the rising edge.
61 * |-----------------| |--------|
68 #define PS2_IRQ_MIN_INTERVAL_US (PS2_CLK_MIN_INTERVAL_US - 20)
72 struct device *dev;
93 } tx; member
98 struct ps2_gpio_data *drvdata = serio->port_data; in ps2_gpio_open()
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
26 interrupt configuration registers, and have a rx and tx interrupt source per
28 appropriate programming of the rx and tx interrupt sources on the appropriate
35 lines can also be routed to different processor sub-systems on DRA7xx as they
48 A Mailbox device node is used to represent a Mailbox IP instance/cluster
49 within a SoC. The sub-mailboxes (actual communication channels) are
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/linux/drivers/net/ethernet/fungible/funeth/
H A Dfuneth_txrx.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
10 /* Tx descriptor size */
13 /* Size of device headers per Tx packet */
16 /* Number of gather list entries per Tx descriptor */
28 /* Max number of Tx descriptors for an sk_buff using a gather list. */
33 /* Max number of Tx descriptors for any packet. */
40 #define FUNETH_CQE_INFO_OFFSET (FUNETH_CQE_SIZE - sizeof(struct fun_cqe_info))
55 /* Per packet tailroom. Present only for 1-frag packets. */
66 FUN_QSTATE_INIT_SW, /* exists in SW, not on the device */
67 FUN_QSTATE_INIT_FULL, /* exists both in SW and on device */
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/linux/drivers/mailbox/
H A Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
25 * descriptors from the tx and rx ring, thus processing one response at a time.
41 #include <linux/mailbox/brcm-message.h>
43 #include <linux/dma-direction.h>
44 #include <linux/dma-mapping.h>
73 #define PREVTXD(i, max_mask) TXD((i) - 1, (max_mask))
75 #define PREVRXD(i, max_mask) RXD((i) - 1, (max_mask))
76 #define NTXDACTIVE(h, t, max_mask) TXD((t) - (h), (max_mask))
77 #define NRXDACTIVE(h, t, max_mask) RXD((t) - (h), (max_mask))
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/linux/drivers/net/wireless/st/cw1200/
H A Dbh.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device handling thread implementation for mac80211 ST-Ericsson CW1200 drivers
5 * Copyright (c) 2010, ST-Ericsson
9 * ST-Ericsson UMAC CW1200 driver, which is
10 * Copyright (c) 2010, ST-Ericsson
29 #define DOWNLOAD_BLOCK_SIZE_WR (0x1000 - 4)
30 /* an SPI message cannot be bigger than (2"12-1)*2 bytes
35 #define EFFECTIVE_BUF_SIZE (MAX_SZ_RD_WR_BUFFERS - PIGGYBACK_CTRL_REG)
56 priv->bh_workqueue = alloc_workqueue("cw1200_bh", in cw1200_register_bh()
60 if (!priv->bh_workqueue) in cw1200_register_bh()
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