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Searched +full:tx +full:- +full:crci (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/mmc/host/
H A Dmmci_qcom_dml.c1 // SPDX-License-Identifier: GPL-2.0-only
51 void __iomem *base = host->base + DML_OFFSET; in qcom_dma_start()
52 struct mmc_data *data = host->data; in qcom_dma_start()
58 if (data->flags & MMC_DATA_READ) { in qcom_dma_start()
60 /* Set producer CRCI-x and disable consumer CRCI */ in qcom_dma_start()
67 writel_relaxed(data->blksz, base + DML_PRODUCER_BAM_BLOCK_SIZE); in qcom_dma_start()
70 writel_relaxed(data->blocks * data->blksz, in qcom_dma_start()
80 /* Set consumer CRCI-x and disable producer CRCI*/ in qcom_dma_start()
103 index = of_property_match_string(np, "dma-names", name); in of_get_dml_pipe_index()
106 return -ENODEV; in of_get_dml_pipe_index()
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/linux/Documentation/devicetree/bindings/serial/
H A Dqcom,msm-uartdm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The MSM serial UARTDM hardware is designed for high-speed use cases where the
16 transmit and/or receive channels can be offloaded to a dma-engine. From a
28 - enum:
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