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Searched +full:tx +full:- +full:clk +full:- +full:10 +full:- +full:inverted (Results 1 – 14 of 14) sorted by relevance

/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110-pine64-star64.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
7 #include "jh7110-common.dtsi"
18 starfive,tx-use-rgmii-clk;
19 assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
20 assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
24 phy-handle = <&phy1>;
25 phy-mode = "rgmii-id";
26 starfive,tx-use-rgmii-clk;
27 assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
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H A Djh7110-milkv-mars.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
7 #include "jh7110-common.dtsi"
10 model = "Milk-V Mars";
15 starfive,tx-use-rgmii-clk;
16 assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
17 assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
29 motorcomm,tx-clk-adj-enabled;
30 motorcomm,tx-clk-10-inverted;
31 motorcomm,tx-clk-100-inverted;
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/dev/mii/
H A Dmcommphy.c31 * Integrated 10/100/1000 Gigabit Ethernet phy
84 #define RX_DELAY_SEL_SHIFT 10
98 #define LOWEST_SET_BIT(mask) ((((mask) - 1) & (mask)) ^ (mask))
141 * different TX inverted configuration depending on speed used in mcommphy_service()
143 if (sc->mii_mpd_model == MCOMMPHY_YT8531_MODEL && in mcommphy_service()
144 (sc->mii_media_active != mii->mii_media_active || in mcommphy_service()
145 sc->mii_media_status != mii->mii_media_status)) { in mcommphy_service()
170 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MCOMMPHY_YT8511_OUI && in mcommphy_probe()
171 MII_MODEL(ma->mii_id2) == MCOMMPHY_YT8511_MODEL && in mcommphy_probe()
172 MII_REV(ma->mii_id2) == MCOMMPHY_YT8511_REV) { in mcommphy_probe()
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
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H A Dmt7986a-bananapi-bpi-r3-mini.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Authors: Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
253 uint32_t reserved29[10];
309 struct al_eth_mac_10g_stats_v3_tx tx; member
390 /* [0x10] 10/100/1000 MAC external configuration */
392 /* [0x14] 10/100/1000 MAC status */
398 /* [0x20] 1/2.5/10G MAC external configuration */
400 /* [0x24] 1/2.5/10G MAC status */
428 /* [0x5c] SerDes TX FIFO control */
430 /* [0x60] SerDes TX FIFO status */
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/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc3250-phy3250.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PHYTEC phyCORE-LPC3250 board
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 /dts-v1/;
13 model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
22 compatible = "gpio-leds";
26 default-state = "off";
31 linux,default-trigger = "heartbeat";
37 power-supply = <&reg_lcd>;
41 remote-endpoint = <&cldc_output>;
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-gta04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on omap3-beagle-xm.dts
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 cpu0-supply = <&vcc>;
27 stdout-pat
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/freebsd/sys/dev/cxgb/common/
H A Dcxgb_t3_hw.c2 SPDX-License-Identifier: BSD-2-Clause
4 Copyright (c) 2007-2009, Chelsio Inc.
38 * t3_wait_op_done_val - wait until an operation is completed
41 * @mask: a single-bit field within @reg that indicates completion
50 * operation completes and -EAGAIN otherwise.
63 if (--attempts == 0) in t3_wait_op_done_val()
64 return -EAGAIN; in t3_wait_op_done_val()
71 * t3_write_regs - write a bunch of registers
84 while (n--) { in t3_write_regs()
85 t3_write_reg(adapter, p->reg_addr + offset, p->val); in t3_write_regs()
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
73 … Mask memory read Bit3 : Mask memory write Bit2 : Mask Completion Bit1 : Mask TX Bit0 : Mask RX
76 … 0x003824UL //Access:R DataWidth:0x20 // tx number of tlp sent
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
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/freebsd/contrib/one-true-awk/testdir/
H A Dfunstack.in2 %%% BibTeX-file{
23 %%% (incompletely) 1970 -- 1979.
50 %%% covering 1958--1996 became too large (about
65 %%% Algorithms 1--492. For Algorithms 493--686,
72 %%% cross-referenced in both directions, so
75 %%% Corrigenda. Cross-referenced entries are
77 %%% that each is completely self-contained.
83 %%% ftp://netlib.bell-labs.com/netlib/toms.
88 %%% http://ciir.cs.umass.edu/cgi-bin/web_query_form/public/cacm2.1.
90 %%% The initial draft of entries for 1981 --
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