| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | intel,ce4100-lapic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
28 [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
32 const: intel,ce4100-lapic
37 interrupt-controller: true
39 '#interrupt-cells':
42 intel,virtual-wire-mode:
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | mt6359.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eason Yen <eason.yen@mediatek.com>
11 - Jiaxin Yu <jiaxin.yu@mediatek.com>
12 - Shane Chien <shane.chien@mediatek.com>
20 mediatek,dmic-mode:
23 Indicates how many data pins are used to transmit two channels of PDM
24 signal. 0 means two wires, 1 means one wire. Default value is 0.
26 - 0 # one wire
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| H A D | mediatek,mt8365-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8365-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Mergnat <amergnat@baylibre.com>
14 const: mediatek,mt8365-afe-pcm
19 "#sound-dai-cells":
24 - description: 26M clock
25 - description: mux for audio clock
26 - description: audio i2s0 mck
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| H A D | mt6358.txt | 10 - compatible - "string" - One of:
11 "mediatek,mt6358-sound"
12 "mediatek,mt6366-sound"
13 - Avdd-supply : power source of AVDD
16 - mediatek,dmic-mode : Indicates how many data pins are used to transmit two
17 channels of PDM signal. 0 means two wires, 1 means one wire. Default
23 compatible = "mediatek,mt6358-sound";
24 Avdd-supply = <&mt6358_vaud28_reg>;
25 mediatek,dmic-mode = <0>;
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| /freebsd/contrib/ldns/ |
| H A D | wire2host.c | 4 * conversion routines from the wire to the host
6 * This will usually just a re-ordering of the
11 * (c) NLnet Labs, 2004-2006
37 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
39 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
41 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
43 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
45 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
47 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
49 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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| /freebsd/crypto/openssl/crypto/ec/curve448/ |
| H A D | point_448.h | 2 * Copyright 2017-2021 The OpenSSL Project Authors. All Rights Reserved.
3 * Copyright 2015-2016 Cryptography Research, Inc.
35 niels_t table[COMBS_N << (COMBS_T - 1)];
38 # define C448_SCALAR_LIMBS ((446-1)/C448_WORD_BITS+1)
85 * Read a scalar from wire format or from bytes.
100 * Read a scalar from wire format or from bytes. Reduces mod scalar prime.
111 * Serialize a scalar to wire format.
121 * Add two scalars. |a|, |b| and |out| may alias each other.
132 * Subtract two scalars. |a|, |b| and |out| may alias each other.
135 * out (out): a-b.
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| H A D | f_generic.c | 2 * Copyright 2017-2021 The OpenSSL Project Authors. All Rights Reserved.
3 * Copyright 2015-2016 Cryptography Research, Inc.
20 /* Serialize to wire format. */
35 buffer |= ((dword_t) red->limb[LIMBPERM(j)]) << fill; in gf_serialize()
40 fill -= 8; in gf_serialize()
52 return 0 - (y->limb[0] & 1); in gf_hibit()
62 return 0 - (y->limb[0] & 1); in gf_lobit()
65 /* Deserialize from wire format; return -1 on success and 0 on failure. */
81 if (j == nbytes - 1) in gf_deserialize()
87 x->limb[LIMBPERM(i)] = (word_t) in gf_deserialize()
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| /freebsd/contrib/unbound/dnstap/ |
| H A D | dnstap.proto | 6 // Written in 2013-2014 by Farsight Security, Inc.
20 // "Dnstap": this is the top-level dnstap type, which is a "union" type that
23 // See: https://developers.google.com/protocol-buffers/docs/techniques#union
38 // This field can be used for adding an arbitrary byte-string annotation to
101 // the Reponse Policy Zone in wire format.
115 // Message: a wire-format (RFC 1035 section 4) DNS message and associated
124 // +---------+ +----------+ +--------+
126 // | Stub |-SQ--------CQ->| Recursive|-RQ----AQ->| Auth. |
128 // | |<-SR--------CR-| |<-RR----AR-| Server |
129 // +---------+ response | | response | |
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| /freebsd/crypto/openssh/ |
| H A D | PROTOCOL.chacha20poly1305 | 1 This document describes the chacha20-poly1305@openssh.com authenticated
5 ----------
12 Poly1305[2], also by Daniel Bernstein, is a one-time Carter-Wegman MAC
13 that computes a 128 bit integrity tag given a message and a single-use
16 The chacha20-poly1305@openssh.com combines these two primitives into an
23 -----------
25 The chacha20-poly1305@openssh.com offers both encryption and
27 chacha20-poly1305@openssh.com cipher is selected in key exchange,
32 ---------------------
34 The chacha20-poly1305@openssh.com cipher requires 512 bits of key
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| /freebsd/contrib/ntp/html/ |
| H A D | xleave.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
14 <!-- #BeginDate format:En2m -->6-Feb-2016 07:17<!-- #EndDate -->
18 …ccuracy it is desirable to capture the transmit timestamp as close to the wire as possible; for ex…
19 … only after the packet has been sent. A solution for this problem is the two-step or interleaved …
20 …ference between the two timestamps, which is called the interleaved or output delay, varies from 1…
24 …w.eecis.udel.edu/~mills/onwire.html">Analysis and Simulation of the NTP On-Wire Protocols</a>, the…
|
| H A D | filter.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
12 <!-- #BeginDate format:En2m -->10-Mar-2014 05:05<!-- #EndDate -->
15 <p>The clock filter algorithm processes the offset and delay samples produced by the on-wire protoc…
19 …over a 24-hr period. As the delay increases, the offset variation increases, so the best samples…
20 …two directions are traffic dependent, this may not be the case. A common case with DSL links is wh…
21 …hm the offset and delay samples from the on-wire protocol are inserted as the youngest stage of …
23 …or each stage, starting from the youngest numbered <em>i</em> = 1, is 2<sup>-<em>i</em></sup>, whi…
24 …d so forth. In practice, the synchronization distance, which is equal to one-half the delay plus t…
29 … for a typical Internet path over a 24-hr period. The graph on the left shows the raw offsets pro…
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| /freebsd/share/dict/ |
| H A D | web2a | 12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
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| /freebsd/sys/dev/ow/ |
| H A D | owll_if.m | 1 #-
33 # Dallas Semiconductor 1-Wire bus Link Layer (owll)
36 # 1-Wire protocol specification.
39 # Note: 1-Wire is a registered trademark of Maxim Integrated Products, Inc.
43 # SoCs have a 1-Wire controller with more smarts or hardware offload.
45 # as well as both usb and i2c 1-Wire controllers.
50 # Two speed classes are defined: Regular speed and Overdrive speed.
74 # Note: This is the polling / busy-wait interface. An interrupt-based interface
75 # may be different. But an interrupt-based, non-blocking interface can be tricky.
80 # WRITE-ONE (see above for timings) From Figure 4-1 AN-937
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| /freebsd/contrib/ofed/opensm/opensm/ |
| H A D | osm_mad_pool.c | 2 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2005 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
6 * This software is available to you under a choice of one of two
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
69 p_pool->mads_out = 0; in osm_mad_pool_init()
95 Next, acquire a wire mad of the specified size. in osm_mad_pool_get()
97 p_mad = osm_vendor_get(h_bind, total_size, &p_madw->vend_wrap); in osm_mad_pool_get()
105 cl_atomic_inc(&p_pool->mads_out); in osm_mad_pool_get()
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| H A D | osm_vl15intf.c | 3 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
4 * Copyright (c) 2002-2010 Mellanox Technologies LTD. All rights reserved.
5 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
7 * This software is available to you under a choice of one of two
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
62 boolean_t resp_expected = p_madw->resp_expected; in vl15_send_mad()
68 method = p_smp->method; in vl15_send_mad()
69 attr_id = p_smp->attr_id; in vl15_send_mad()
72 Non-response-expected mads are not throttled on the wire in vl15_send_mad()
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| /freebsd/crypto/openssl/doc/man3/ |
| H A D | SSL_get_ciphers.pod | 12 - get list of available SSL_CIPHERs
54 as a wire-protocol cipher suite specification (in the three-octet-per-cipher
55 SSLv2 wire format if B<isv2format> is nonzero; otherwise the two-octet
56 SSLv3/TLS wire format), and parses the cipher suites supported by the library
57 into the returned stacks of SSL_CIPHER objects sk and Signalling Cipher-Suite
110 Copyright 2000-2018 The OpenSSL Project Authors. All Rights Reserved.
|
| /freebsd/sys/dev/iscsi/ |
| H A D | icl.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
77 * When a "large" received PDU represents multiple on-the-wire
78 * PDUs, this is the count of additional on-the-wire PDUs.
79 * For PDUs that match on-the-wire PDUs, this should be set to
121 #define ICL_CONN_LOCK(X) mtx_lock(X->ic_lock)
122 #define ICL_CONN_UNLOCK(X) mtx_unlock(X->ic_lock)
123 #define ICL_CONN_LOCK_ASSERT(X) mtx_assert(X->ic_lock, MA_OWNED)
124 #define ICL_CONN_LOCK_ASSERT_NOT(X) mtx_assert(X->ic_lock, MA_NOTOWNED)
162 * Those two are not a public API; only to be used between icl_soft.c
|
| /freebsd/tools/tools/netmap/ |
| H A D | README | 4 pkt-gen a multi-function packet generator and traffic sink
6 bridge a two-port jumper wire, also using the netmap API
|
| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8186-corsola-steelix-sku131072.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola-steelix.dtsi"
11 compatible = "google,steelix-sku131072", "google,steelix",
13 chassis-type = "convertible";
17 mediatek,dmic-mode = <0>; /* two-wire */
|
| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpc5200.txt | 2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
11 to the device based solely on the compatible value. If two drivers
21 "fsl,mpc5200-<device>".
28 should have two items in the compatible list:
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
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| /freebsd/contrib/ofed/opensm/include/opensm/ |
| H A D | osm_stats.h | 2 * Copyright (c) 2004-2008 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2005 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
6 * This software is available to you under a choice of one of two
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
113 * The number of MADs outstanding on the wire at any moment.
122 * Total number of response-less MADs sent on the wire. This count
154 pthread_mutex_lock(&stats->mutex); in osm_stats_inc_qp0_outstanding()
155 outstanding = ++stats->qp0_mads_outstanding; in osm_stats_inc_qp0_outstanding()
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| /freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
| H A D | zii,rave-sp-wdt.txt | 7 Documentation/devicetree/bindings/mfd/zii,rave-sp.txt)
11 - compatible: Depending on wire protocol implemented by RAVE SP
13 - "zii,rave-sp-watchdog"
14 - "zii,rave-sp-watchdog-legacy"
18 - wdt-timeout: Two byte nvmem cell specified as per
23 rave-sp {
24 compatible = "zii,rave-sp-rdu1";
25 current-speed = <38400>;
28 wdt_timeout: wdt-timeout@8E {
34 compatible = "zii,rave-sp-watchdog";
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | mt9p031.txt | 1 * Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor
3 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor with
5 two-wire serial interface.
8 - compatible: value should be either one among the following
12 - input-clock-frequency: Input clock frequency.
14 - pixel-clock-frequency: Pixel clock frequency.
17 - reset-gpios: Chip reset GPIO
20 Documentation/devicetree/bindings/media/video-interfaces.txt.
30 reset-gpios = <&gpio3 30 0>;
34 input-clock-frequency = <6000000>;
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| H A D | mt9m111.txt | 4 array size of 1280H x 1024V. It is programmable through a simple two-wire serial
8 - compatible: value should be "micron,mt9m111"
9 - clocks: reference to the master clock.
10 - clock-names: shall be "mclk".
13 sub-node for its digital output video port, in accordance with the video
15 Documentation/devicetree/bindings/media/video-interfaces.txt
18 - pclk-sample: For information see ../video-interfaces.txt. The value is set to
28 clock-names = "mclk";
32 remote-endpoint = <&pxa_camera>;
33 pclk-sample = <1>;
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-octeon.txt | 1 * Two Wire Serial Interface (TWSI) / I2C
3 - compatible: "cavium,octeon-3860-twsi"
9 compatible: "cavium,octeon-7890-twsi"
13 - reg: The base address of the TWSI/I2C bus controller register bank.
15 - #address-cells: Must be <1>.
17 - #size-cells: Must be <0>. I2C addresses have no size component.
19 - interrupts: A single interrupt specifier.
21 - clock-frequency: The I2C bus clock rate in Hz.
25 #address-cells = <1>;
26 #size-cells = <0>;
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