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/linux/Documentation/admin-guide/pm/
H A Dintel_pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
58 active mode, it uses its own internal performance scaling governor algorithm or
60 mode it responds to requests made by a generic ``CPUFreq`` governor implementing
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H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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/linux/Documentation/ABI/testing/
H A Dsysfs-platform-msi-laptop1 What: /sys/devices/platform/msi-laptop-pf/lcd_level
8 What: /sys/devices/platform/msi-laptop-pf/auto_brightness
17 What: /sys/devices/platform/msi-laptop-pf/wlan
24 What: /sys/devices/platform/msi-laptop-pf/bluetooth
33 What: /sys/devices/platform/msi-laptop-pf/touchpad
41 What: /sys/devices/platform/msi-laptop-pf/turbo_mode
46 Contains either 0 or 1 and indicates if turbo mode is turned
47 on. In turbo mode power LED is orange and processor is
48 overclocked. Turbo mode is available only if charging. It is
49 only possible to toggle turbo mode state by pressing Fn+F10,
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/linux/arch/arm/boot/dts/sigmastar/
H A Dmstar-infinity3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include "mstar-infinity.dtsi"
10 opp-1008000000 {
11 opp-hz = /bits/ 64 <1008000000>;
12 opp-microvolt = <1000000>;
13 clock-latency-ns = <300000>;
17 opp-108000000 {
18 opp-hz = /bits/ 64 <1080000000>;
19 opp-microvolt = <1000000>;
20 clock-latency-ns = <300000>;
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/linux/drivers/iio/adc/
H A Dad7944.c1 // SPDX-License-Identifier: GPL-2.0-only
26 #include <linux/iio/buffer-dmaengine.h>
33 /* Normal mode max conversion time (t_{CONV}). */
35 /* TURBO mode max conversion time (t_{CONV}). */
40 /* datasheet calls this "4-wire mode" */
42 /* datasheet calls this "3-wire mode" (not related to SPI_3WIRE!) */
44 /* datasheet calls this "chain mode" */
48 /* maps adi,spi-mode property value to enum */
67 /* Chip-specific timing specifications. */
71 /* Optional GPIO to enable turbo mode. */
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/linux/include/uapi/misc/
H A Dxilinx_sdfec.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Xilinx SD-FEC
26 (XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
28 (XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
30 (XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
33 * enum xsdfec_code - Code Type.
34 * @XSDFEC_TURBO_CODE: Driver is configured for Turbo mode.
35 * @XSDFEC_LDPC_CODE: Driver is configured for LDPC mode.
37 * This enum is used to indicate the mode of the driver. The mode is determined
38 * by checking which codes are set in the driver. Note that the mode cannot be
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/linux/tools/power/x86/x86_energy_perf_policy/
H A Dx86_energy_perf_policy.81 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy
10 .RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
12 .RB "cpu-list, pkg-lis
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/linux/drivers/platform/x86/
H A Dintel_ips.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2009-2010 Intel Corporation
10 * Some Intel Ibex Peak based platforms support so-called "intelligent
16 * primary purpose is to safely allow CPU and GPU turbo modes to be enabled
17 * by tracking power and thermal budget; secondarily it can boost turbo
34 * - dual MCP configs
37 * - handle CPU hotplug
38 * - provide turbo enable/disable api
41 * - CDI 403777, 403778 - Auburndale EDS vol 1 & 2
42 * - CDI 401376 - Ibex Peak EDS
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H A Dacer-wmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2007-2009 Carlos Corbacho <carlos@strangeworlds.co.uk>
8 * Copyright (C) 2005-2007 E.M. Smith
9 * Copyright (C) 2007-2008 Carlos Corbacho <cathectic@gmail.com>
30 #include <linux/input/sparse-keymap.h>
44 * Meaning is unknown - this number is required for writing to ACPI for AMW0
87 #define AMW0_GUID1 "67C3371D-95A3-4C37-BB61-DD47B491DAAB"
88 #define AMW0_GUID2 "431F16ED-0C2B-444C-B267-27DEB140CF9C"
89 #define WMID_GUID1 "6AF4F258-B401-42FD-BE91-3D4AC2D7C0D3"
90 #define WMID_GUID2 "95764E09-FB56-4E83-B31A-37761F60994A"
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/linux/tools/power/cpupower/man/
H A Dcpupower-set.11 .TH CPUPOWER\-SET "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-set \- Set processor power related kernel or hardware configurations
6 .B cpupower set [ \-b VAL | \-e POLICY | \-m MODE | \-t BOOL ]
15 described in the cpupower(1) manpage in the \-\-cpu option section. Whether an
24 \-\-perf-bias, \-b
30 The range of valid numbers is 0-15, where 0 is maximum
33 The processor uses this information in model-specific ways
34 when it must select trade-offs between performance and
38 (P-states) or CPU Idle power states (C-states), but allows
44 in the "turbo range" above the explicitly OS-controlled
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/linux/tools/power/x86/intel-speed-select/
H A Disst-config.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
55 static int current_clos = -1;
56 static int clos_epp = -1;
57 static int clos_prop_prio = -1;
58 static int clos_min = -1;
59 static int clos_max = -1;
60 static int clos_desired = -1;
168 /* only three CascadeLake-N models are supported */ in update_cpu_model()
177 err(-1, "cannot open /proc/cpuinfo\n"); in update_cpu_model()
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/linux/tools/power/cpupower/utils/
H A Dcpupower-set.c1 // SPDX-License-Identifier: GPL-2.0-only
20 {"perf-bias", required_argument, NULL, 'b'},
22 {"amd-pstate-mode", required_argument, NULL, 'm'},
23 {"turbo-boost", required_argument, NULL, 't'},
45 int mode:1; in cmd_set() member
52 char epp[30], mode[20]; in cmd_set() local
67 set_opts, NULL)) != -1) { in cmd_set()
74 printf(_("--perf-bias param out " in cmd_set()
75 "of range [0-%d]\n"), 15); in cmd_set()
85 return -EINVAL; in cmd_set()
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/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779m1.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car H3e-2G (R8A779M1) SoC
15 opp-1700000000 {
16 /delete-property/ turbo-mode;
18 opp-2000000000 {
19 opp-hz = /bits/ 64 <2000000000>;
20 opp-microvolt = <960000>;
21 clock-latency-ns = <300000>;
22 turbo-mode;
H A Dr8a779m5.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car M3Ne-2G (R8A779M5) SoC
15 opp-1800000000 {
16 /delete-property/ turbo-mode;
18 opp-2000000000 {
19 opp-hz = /bits/ 64 <2000000000>;
20 opp-microvolt = <960000>;
21 clock-latency-ns = <300000>;
22 turbo-mode;
H A Dr8a779m3.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car M3e-2G (R8A779M3) SoC
15 opp-1800000000 {
16 /delete-property/ turbo-mode;
18 opp-2000000000 {
19 opp-hz = /bits/ 64 <2000000000>;
20 opp-microvolt = <960000>;
21 clock-latency-ns = <300000>;
22 turbo-mode;
/linux/drivers/net/wireless/ath/ath5k/
H A Dreset.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Luis Rodriguez <mcgrof@winlab.rutgers.edu>
5 * Copyright (c) 2007-2008 Pavel Roskin <proski@gnu.org>
6 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
30 #include <linux/pci.h> /* To determine if a card is pci-e */
52 * ath5k_hw_register_timeout() - Poll a register for a flag/field change
64 * Returns -EAGAIN if we exceeded AR5K_TUNE_REGISTER_TIMEOUT * 15us or 0
73 for (i = AR5K_TUNE_REGISTER_TIMEOUT; i > 0; i--) { in ath5k_hw_register_timeout()
82 return (i <= 0) ? -EAGAIN : 0; in ath5k_hw_register_timeout()
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H A Dath5k.h2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8 0x0058 /* AR5312 WMAC (AP43-030) */
70 #define PCI_DEVICE_ID_ATHEROS_AR2413 0x001a /* AR2413 (Griffin-lite) */
72 #define PCI_DEVICE_ID_ATHEROS_AR5424 0x001c /* AR5424 (Condor PCI-E) */
189 #define AR5K_TUNE_NOISE_FLOOR -72
190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95
236 /* Preamble time for 40MHz (turbo) operation (min ?) */
247 /* Tx latency for 40MHz (turbo) operation (min ?) */
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/linux/drivers/clk/pxa/
H A Dclk-pxa27x.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/clock.c.
9 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/pxa-clock.h>
18 #include "clk-pxa.h"
19 #include "clk-pxa2xx.h"
67 return (interval - 31) / 32; in mdrefr_dri()
71 * Get the clock frequency as reflected by CCSR and the turbo flag.
91 pr_info("Run Mode clock: %ld.%02ldMHz\n", in pxa27x_get_clk_frequency_khz()
93 pr_info("Turbo Mode clock: %ld.%02ldMHz\n", in pxa27x_get_clk_frequency_khz()
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H A Dclk-pxa3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/pxa3xx.c
9 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
14 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/pxa-clock.h>
22 #include "clk-pxa.h"
37 #define ACCR_D0CS (1 << 26) /* D0 Mode Clock Select */
38 #define ACCR_PCCE (1 << 11) /* Power Mode Change Clock Enable */
44 #define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */
46 #define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */
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/linux/arch/arm/mach-pxa/
H A Dsleep.S2 * Low-level PXA250/210 sleep/wakeUp support
17 #include "pxa2xx-regs.h"
28 * pxa3xx_finish_suspend() - forces CPU into sleep state (S2D3C4)
31 mov r0, #0x06 @ S2D3C4 mode
49 @ prepare value for sleep mode
50 mov r1, r0 @ sleep mode
59 @ enable SDRAM self-refresh mode
62 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
90 @ prepare value for sleep mode
91 mov r1, r0 @ sleep mode
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/linux/drivers/cpufreq/
H A Dpxa2xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * 31-Jul-2002 : Initial version [FB]
7 * 29-Jan-2003 : added PXA255 support [FB]
8 * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
61 /* CPU MEMBUS run turbo PXbus SDRAM */
62 { 99500, -1, -1}, /* 99, 99, 50, 50 */
63 {132700, -1, -1}, /* 133, 133, 66, 66 */
64 {199100, -1, -1}, /* 199, 199, 99, 99 */
65 {265400, -1, -1}, /* 265, 265, 133, 66 */
66 {331800, -1, -1}, /* 331, 331, 166, 83 */
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/linux/Documentation/iio/
H A Dad4000.rst1 .. SPDX-License-Identifier: GPL-2.0-only
41 * `AD7988-1 <https://www.analog.com/AD7988-1>`_
42 * `AD7988-5 <https://www.analog.com/AD7988-5>`_
45 ------------------
50 CS mode, 3-wire turbo mode
53 Datasheet "3-wire" mode is what most resembles standard SPI connection which,
56 "CS Mode, 3-Wire Turbo Mode" connection in datasheets.
57 NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the
58 same of standard spi-3wire mode.
59 This is the only connection mode that allows configuration register access but
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/linux/arch/x86/math-emu/
H A DREADME1 +---------------------------------------------------------------------------+
2 | wm-FPU-emu an FPU emulator for 80386 and 80486SX microprocessors. |
6 | Australia. E-mail billm@melbpc.org.au |
21 +---------------------------------------------------------------------------+
25 wm-FPU-emu is an FPU emulator for Linux. It is derived from wm-emu387
27 msdos); wm-emu387 was in turn based upon emu387 which was written by
31 My target FPU for wm-FPU-emu is that described in the Intel486
40 wm-FPU-emu does not implement all of the behaviour of the 80486 FPU,
52 --Bill Metzenthen
56 ----------------------- Internals of wm-FPU-emu -----------------------
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/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-base.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
25 pattern: '^opp-table(-[a-z0-9]+)?$'
27 opp-shared:
36 '^opp(-?[0-9]+)*$':
39 One or more OPP nodes describing voltage-current-frequency combinations.
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H A Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
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