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/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
[all …]
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
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/linux/Documentation/wmi/devices/
H A Dlenovo-wmi-other.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 Lenovo WMI Interface Other Mode Driver (lenovo-wmi-other)
10 The primary Other Mode interface provides advanced power tuning features
16 ----------
18 WMI GUID ``DC2A8805-3A8C-41BA-A6F7-092E0089CD3B``
22 CPU and GPU power limit tuning as well as various other attributes for
32 /sys/class/firmware-attributes/lenovo-wmi-other/attributes/<attribute>/
35 -------------------------
37 WMI GUID ``7A8F5407-CB67-4D6E-B547-39B3BE018154``
43 - current_value
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul-tqma6ul2l.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulxl-common.dtsi"
12 model = "TQ-Systems TQMa6UL2L SoM";
13 compatible = "tq,imx6ul-tqma6ul2l", "fsl,imx6ul";
17 fsl,tuning-step = <6>;
38 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
55 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
H A Dimx6ul-tqma6ul2.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulx-common.dtsi"
12 model = "TQ-Systems TQMa6UL2 SoM";
13 compatible = "tq,imx6ul-tqma6ul2", "fsl,imx6ul";
17 fsl,tuning-step = <6>;
38 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
55 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
H A Dimx6ull-tqma6ull2.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulx-common.dtsi"
12 model = "TQ-Systems TQMa6ULL2 SoM";
13 compatible = "tq,imx6ull-tqma6ull2", "fsl,imx6ull";
17 fsl,tuning-step = <6>;
19 max-frequency = <99000000>;
20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
[all …]
H A Dimx6ull-tqma6ull2l.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulxl-common.dtsi"
13 compatible = "tq,imx6ull-tqma6ull2l", "fsl,imx6ull";
17 fsl,tuning-step = <6>;
19 max-frequency = <99000000>;
20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
21 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
[all …]
H A Dimxrt1050.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "../../armv7-m.dtsi"
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/imxrt1050-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <24000000>;
[all …]
H A Dimx7d-pico.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
11 compatible = "pwm-backlight";
13 brightness-levels = <0 36 72 108 144 180 216 255>;
14 default-brightness-level = <6>;
24 compatible = "vxt,vl050-8048nt-c01";
26 power-supply = <&reg_lcd_3v3>;
30 remote-endpoint = <&display_out>;
35 reg_lcd_3v3: regulator-lcd-3v3 {
36 compatible = "regulator-fixed";
[all …]
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00link.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
10 Abstract: rt2x00 generic link tuning routines.
20 * When we lack RSSI information return something less then -80 to
23 #define DEFAULT_RSSI -128
31 return -avg; in rt2x00link_get_avg_rssi()
38 struct link_ant *ant = &rt2x00dev->link.ant; in rt2x00link_antenna_get_link_rssi()
40 if (rt2x00dev->link.qual.rx_success) in rt2x00link_antenna_get_link_rssi()
41 return rt2x00link_get_avg_rssi(&ant->rssi_ant); in rt2x00link_antenna_get_link_rssi()
48 struct link_ant *ant = &rt2x00dev->link.ant; in rt2x00link_antenna_get_rssi_history()
[all …]
/linux/drivers/clk/sunxi-ng/
H A Dccu_sdm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
9 #include <linux/clk-provider.h>
17 * XXX We don't know what the step and bottom register fields
36 /* second enable bit in tuning register */
/linux/tools/thermal/tmon/
H A Dpid.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 * PID (Proportional-Integral-Derivative) controller is commonly used in
39 * y[k] = y[k-1] - kp*(x[k] - x[k-1]) + Ki*Ts*e[k] - Kd*(x[k]
40 * - 2*x[k-1]+x[k-2])/Ts
46 static double xk_1, xk_2; /* input temperature x[k-#] */
50 * 1. use CPU burn to produce open loop unit step response
51 * 2. calculate PID based on Ziegler-Nichols rule
53 * add a flag for tuning PID
60 /* TODO: get it from TUI tuning tab */ in init_thermal_controller()
73 syslog(LOG_DEBUG, "TC inactive, relax p-state\n"); in controller_reset()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/linux/drivers/mmc/host/
H A Dsdhci-pci-gli.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pci.h"
21 #include "sdhci-uhs2.h"
374 /* reset the tuning flow after reinit and before starting tuning */ in gli_set_9750()
411 /* enable tuning parameters control */ in gli_set_9750()
417 /* write tuning parameters */ in gli_set_9750()
420 /* disable tuning parameters control */ in gli_set_9750()
468 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
[all …]
H A Dsdhci-xenon-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
17 #include "sdhci-pltfm.h"
18 #include "sdhci-xenon.h"
197 /* Divider for calculating Tuning Step */
209 params = devm_kzalloc(mmc_dev(host->mmc), sizeof(*params), GFP_KERNEL); in xenon_alloc_emmc_phy()
211 return -ENOMEM; in xenon_alloc_emmc_phy()
213 priv->phy_params = params; in xenon_alloc_emmc_phy()
214 if (priv->phy_type == EMMC_5_0_PHY) in xenon_alloc_emmc_phy()
215 priv->emmc_phy_regs = &xenon_emmc_5_0_phy_regs; in xenon_alloc_emmc_phy()
[all …]
/linux/drivers/media/radio/si4713/
H A Dsi4713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/media/radio/si4713-i2c.c
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-common.h>
28 MODULE_PARM_DESC(debug, "Debug level (0 - 2)");
46 #define DEFAULT_ACOMP_THRESHOLD (-0x28)
160 int rval = -EINVAL; in usecs_to_dev()
176 v4l2_dbg(2, debug, &sdev->sd, in si4713_handler()
178 complete(&sdev->work); in si4713_handler()
[all …]
/linux/include/media/
H A Ddvb_frontend.h4 * The Digital TV Frontend kABI defines a driver-internal interface for
5 * registering low-level, hardware specific driver to a hardware independent
28 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
61 * struct dvb_frontend_tune_settings - parameters to adjust frontend tuning
63 * @min_delay_ms: minimum delay for tuning, in ms
64 * @step_size: step size between two consecutive frequencies
78 * struct dvb_tuner_info - Frontend name and min/max ranges/bandwidths
83 * @frequency_step_hz: frequency step in Hz
86 * @bandwidth_step: frontend bandwidth step
101 * struct analog_parameters - Parameters to tune into an analog/radio channel
[all …]
/linux/Documentation/admin-guide/media/
H A Dfaq.rst1 .. SPDX-License-Identifier: GPL-2.0
23 1. The signal seems to die a few seconds after tuning.
28 is closed). The ``dvb-core`` module parameter ``dvb_shutdown_timeout``
37 tools and are grouped together with the ``v4l-utils`` git repository:
39 https://git.linuxtv.org/v4l-utils.git/
45 The first step is to get a list of services that are transmitted.
48 for example the ``dvbv5-scan`` tool. You can find more information
51 https://www.linuxtv.org/wiki/index.php/Dvbv5-scan
70 https://git.linuxtv.org/dtv-scan-tables.git
88 list with a tool like ``dvbv5-scan``.
[all …]
/linux/drivers/infiniband/hw/hfi1/
H A Dpcie.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright(c) 2015 - 2019 Intel Corporation.
27 struct pci_dev *pdev = dd->pcidev; in hfi1_pcie_init()
43 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
49 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
53 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in hfi1_pcie_init()
60 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in hfi1_pcie_init()
90 * fields required to re-initialize after a chip reset, or for
111 return -EINVAL; in hfi1_pcie_ddinit()
114 dd->kregbase1 = ioremap(addr, RCV_ARRAY); in hfi1_pcie_ddinit()
[all …]
/linux/Documentation/admin-guide/blockdev/
H A Dfloppy.rst19 Example: If your kernel is called linux-2.6.9, type the following line
22 linux-2.6.9 floppy=thinkpad
25 of linux-2.6.9::
31 linux-2.6.9 floppy=daring floppy=two_fdc
96 and is thus harder to find, whereas non-dma buffers may be
104 If you have a FIFO-able FDC, the floppy driver automatically
105 falls back on non DMA mode if no DMA-able memory can be found.
130 using 'floppycontrol --messages'. Then access a floppy
131 disk. If you get a huge amount of "Over/Underrun - retrying"
135 when doing this tuning. Indeed, it allows to try different
[all …]
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-naneng-combphy.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/phy/phy.h>
214 temp = readl(priv->mmio + reg); in rockchip_combphy_updatel()
216 writel(temp, priv->mmio + reg); in rockchip_combphy_updatel()
224 tmp = en ? reg->enable : reg->disable; in rockchip_combphy_param_write()
225 mask = GENMASK(reg->bitend, reg->bitstart); in rockchip_combphy_param_write()
226 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in rockchip_combphy_param_write()
228 return regmap_write(base, reg->offset, val); in rockchip_combphy_param_write()
233 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_is_ready()
236 mask = GENMASK(cfg->pipe_phy_status.bitend, in rockchip_combphy_is_ready()
[all …]
/linux/Documentation/driver-api/media/drivers/
H A Dvidtv.rst1 .. SPDX-License-Identifier: GPL-2.0
10 ----------
18 - A fake tuner driver, which will report a bad signal quality if the chosen
22 - A fake demod driver, which will constantly poll the fake signal quality
26 - A fake bridge driver, which is the module responsible for modprobing the
31 - Code responsible for encoding a valid MPEG Transport Stream, which is then
33 For now, we have a single, audio-only channel containing a single MPEG
34 Elementary Stream, which in turn contains a SMPTE 302m encoded sine-wave.
39 --------------
45 - Enable **DVB_TEST_DRIVERS**, then
[all …]

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