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/linux/drivers/input/touchscreen/
H A Dtps6507x-ts.c50 static int tps6507x_read_u8(struct tps6507x_ts *tsc, u8 reg, u8 *data) in tps6507x_read_u8() argument
52 return tsc->mfd->read_dev(tsc->mfd, reg, 1, data); in tps6507x_read_u8()
55 static int tps6507x_write_u8(struct tps6507x_ts *tsc, u8 reg, u8 data) in tps6507x_write_u8() argument
57 return tsc->mfd->write_dev(tsc->mfd, reg, 1, &data); in tps6507x_write_u8()
60 static s32 tps6507x_adc_conversion(struct tps6507x_ts *tsc, in tps6507x_adc_conversion() argument
69 ret = tps6507x_write_u8(tsc, TPS6507X_REG_TSCMODE, tsc_mode); in tps6507x_adc_conversion()
71 dev_err(tsc->dev, "TSC mode read failed\n"); in tps6507x_adc_conversion()
77 ret = tps6507x_write_u8(tsc, TPS6507X_REG_ADCONFIG, in tps6507x_adc_conversion()
80 dev_err(tsc->dev, "ADC config write failed\n"); in tps6507x_adc_conversion()
85 ret = tps6507x_read_u8(tsc, TPS6507X_REG_ADCONFIG, in tps6507x_adc_conversion()
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H A Dcy8ctmg110_ts.c61 static int cy8ctmg110_write_regs(struct cy8ctmg110 *tsc, unsigned char reg, in cy8ctmg110_write_regs() argument
64 struct i2c_client *client = tsc->client; in cy8ctmg110_write_regs()
82 static int cy8ctmg110_read_regs(struct cy8ctmg110 *tsc, in cy8ctmg110_read_regs() argument
85 struct i2c_client *client = tsc->client; in cy8ctmg110_read_regs()
110 static int cy8ctmg110_touch_pos(struct cy8ctmg110 *tsc) in cy8ctmg110_touch_pos() argument
112 struct input_dev *input = tsc->input; in cy8ctmg110_touch_pos()
118 if (cy8ctmg110_read_regs(tsc, reg_p, 9, CY8CTMG110_TOUCH_X1) != 0) in cy8ctmg110_touch_pos()
156 struct cy8ctmg110 *tsc = dev_id; in cy8ctmg110_irq_thread() local
158 cy8ctmg110_touch_pos(tsc); in cy8ctmg110_irq_thread()
H A Dtsc40.c3 * TSC-40 serial touchscreen driver. It should be compatible with
4 * TSC-10 and 25.
97 input_dev->name = "TSC-10/25/40 Serial TouchScreen"; in tsc_connect()
155 #define DRIVER_DESC "TSC-10/25/40 serial touchscreen driver"
/linux/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst14 3) TSC Hardware
37 First we discuss the basic hardware devices available. TSC and the related
324 3. TSC Hardware
327 The TSC or time stamp counter is relatively simple in theory; it counts
332 The TSC is represented internally as a 64-bit MSR which can be read with the
334 limitations made it possible to write the TSC, but generally on old hardware it
339 write the TSC MSR is not an architectural guarantee.
341 The TSC is accessible from CPL-0 and conditionally, for CPL > 0 software by
342 means of the CR4.TSD bit, which when enabled, disables CPL > 0 TSC access.
345 atomically not just the TSC, but an indicator which corresponds to the
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H A Dhypercalls.rst122 __u64 tsc;
130 * tsc: guest TSC value used to calculate sec/nsec pair
134 host and guest. The guest can use the returned TSC value to
137 Returns KVM_EOPNOTSUPP if the host does not use TSC clocksource,
/linux/drivers/thermal/tegra/
H A Dtegra30-tsensor.c163 const struct tegra_tsensor_channel *tsc = thermal_zone_device_priv(tz); in tegra_tsensor_get_temp() local
164 const struct tegra_tsensor *ts = tsc->ts; in tegra_tsensor_get_temp()
172 err = readl_relaxed_poll_timeout(tsc->regs + TSENSOR_SENSOR0_STATUS0, val, in tegra_tsensor_get_temp()
177 dev_err_once(ts->dev, "ch%u: counter invalid\n", tsc->id); in tegra_tsensor_get_temp()
181 val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_TS_STATUS1); in tegra_tsensor_get_temp()
190 dev_err_once(ts->dev, "ch%u: counter overflow\n", tsc->id); in tegra_tsensor_get_temp()
221 const struct tegra_tsensor_channel *tsc = thermal_zone_device_priv(tz); in tegra_tsensor_set_trips() local
222 const struct tegra_tsensor *ts = tsc->ts; in tegra_tsensor_set_trips()
232 val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG1); in tegra_tsensor_set_trips()
237 writel_relaxed(val, tsc->regs + TSENSOR_SENSOR0_CONFIG1); in tegra_tsensor_set_trips()
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/linux/tools/testing/selftests/kvm/x86/
H A Dnested_tsc_scaling_test.c7 * This test case verifies that nested TSC scaling behaves as expected when
33 * This function checks whether the "actual" TSC frequency of a guest matches
34 * its expected frequency. In order to account for delays in taking the TSC
47 "TSC freq is expected to be between %"PRIu64" and %"PRIu64 in compare_tsc_freq()
51 "TSC freq is expected to be between %"PRIu64" and %"PRIu64 in compare_tsc_freq()
61 * Reading the TSC twice with about a second's difference should give in check_tsc_freq()
62 * us an approximation of the TSC frequency from the guest's in check_tsc_freq()
93 /* enable TSC scaling for L2 */ in l1_svm_code()
120 /* enable TSC offsetting and TSC scaling for L2 */ in l1_vmx_code()
185 printf("real TSC frequency is around: %"PRIu64"\n", l0_tsc_freq); in main()
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H A Dhyperv_clock.c88 /* Compare TSC page clocksource with HV_X64_MSR_TIME_REF_COUNT */ in check_tsc_msr_tsc_page()
114 /* Set up TSC page is disabled state, check that it's clean */ in guest_main()
122 /* Set up TSC page is enabled state */ in guest_main()
133 /* Call KVM_SET_CLOCK from userspace, check that TSC page was updated */ in guest_main()
136 /* Sanity check TSC page timestamp, it should be close to 0 */ in guest_main()
144 * Enable Re-enlightenment and check that TSC page stays constant across in guest_main()
160 * Disable re-enlightenment and TSC page, check that KVM doesn't update in guest_main()
182 TEST_ASSERT(tsc_freq > 0, "TSC frequency must be nonzero"); in host_check_tsc_msr_rdtsc()
202 "Elapsed time does not match (MSR=%ld, TSC=%ld)", in host_check_tsc_msr_rdtsc()
224 "TSC page has to be page aligned"); in main()
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H A Dvmx_preemption_timer_test.c139 * tsc deadlines so that host can verify they are as expected in l1_guest_code()
210 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
213 pr_info("Stage %d: L2 PT expiry TSC (%lu) , L2 TSC deadline (%lu)\n", in main()
217 "Stage %d: L1 PT expiry TSC (%lu) < L1 TSC deadline (%lu)", in main()
221 "Stage %d: L2 PT expiry TSC (%lu) > L2 TSC deadline (%lu)", in main()
H A Dnested_tsc_adjust_test.c8 * IA32_TIME_STAMP_COUNTER MSR adds (or subtracts) value X from the TSC,
13 * WRMSR(IA32_TSC) from L2 sets L1's TSC value, not L2's perceived TSC
80 /* Set TSC from L1 and make sure TSC_ADJUST is updated correctly */ in l1_guest_code()
86 * Run L2 with TSC_OFFSET. L2 will write to TSC, and L1 is not in l1_guest_code()
/linux/tools/power/cpupower/utils/idle_monitor/
H A Dmperf_monitor.c67 * 1) calculated after measurements if we know TSC ticks at mperf/P0 frequency
83 static int mperf_get_tsc(unsigned long long *tsc) in mperf_get_tsc() argument
87 ret = read_msr(base_cpu, MSR_TSC, tsc); in mperf_get_tsc()
89 dprint("Reading TSC MSR failed, returning %llu\n", *tsc); in mperf_get_tsc()
174 dprint("%s: TSC Ref - mperf_diff: %llu, tsc_diff: %llu\n", in mperf_get_count_percent()
208 /* Calculate max_freq from TSC count */ in mperf_get_count_freq()
217 (max_freq_mode == MAX_FREQ_TSC_REF) ? "TSC calculated" : "sysfs read"); in mperf_get_count_freq()
255 * we use TSC counter if it reliably ticks at P0/mperf frequency.
259 * on older Intel HW without invariant TSC feature.
260 * Or on AMD machines where TSC does not tick at P0 (do not exist yet, but
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/linux/tools/perf/tests/
H A Dperf-time-to-tsc.c20 #include "tsc.h"
26 * Except x86_64/i386 and Arm64, other archs don't support TSC in perf. Just
61 * test__perf_time_to_tsc - test converting perf time to TSC.
64 * to and from TSC is consistent with the order of events. If the test passes
65 * %0 is returned, otherwise %-1 is returned. If TSC conversion is not
186 pr_debug("1st event perf time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
188 pr_debug("rdtsc time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
190 pr_debug("2nd event perf time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
211 TEST_CASE_REASON("TSC support", tsc_is_supported,
213 TEST_CASE_REASON("Perf time to TSC", perf_time_to_tsc,
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/linux/arch/x86/include/asm/xen/
H A Dcpuid.h78 * Sub-leaf 0: EAX: bit 0: emulated tsc
79 * bit 1: host tsc is known to be reliable
83 * ECX: guest tsc frequency in kHz
84 * EDX: guest tsc incarnation (migration count)
85 * Sub-leaf 1: EAX: tsc offset low part
86 * EBX: tsc offset high part
87 * ECX: multiplicator for tsc->ns conversion
88 * EDX: shift amount for tsc->ns conversion
89 * Sub-leaf 2: EAX: host tsc frequency in kHz
/linux/tools/perf/util/intel-pt-decoder/
H A Dintel-pt-decoder.c362 * A TSC packet can slip past MTC packets so that the timestamp appears in intel_pt_decoder_new()
364 * cycles, which is certainly less than 0x1000 TSC ticks, but accept in intel_pt_decoder_new()
879 * For now, do not support using TSC packets - refer in intel_pt_calc_cyc_cb()
965 intel_pt_log("Timestamp: calculated %g TSC ticks per cycle too big (c.f. CBR-based value %g), pos " x64_fmt "\n", in intel_pt_calc_cyc_cb()
974 intel_pt_log("Timestamp: calculated %g TSC ticks per cycle c.f. CBR-based value %g, pos " x64_fmt "\n", in intel_pt_calc_cyc_cb()
977 intel_pt_log("Timestamp: calculated %g TSC ticks per cycle c.f. unknown CBR-based value, pos " x64_fmt "\n", in intel_pt_calc_cyc_cb()
1002 * For now, do not support using TSC packets for at least the reasons: in intel_pt_calc_cyc_to_tsc()
1004 * 2) TSC packets within PSB+ can slip against CYC packets in intel_pt_calc_cyc_to_tsc()
2320 bool tsc, pip, vmcs, tma, psbend;
2343 data->tsc in intel_pt_vm_psb_lookahead_cb()
2318 bool tsc, pip, vmcs, tma, psbend; global() member
4172 intel_pt_next_tsc(unsigned char * buf,size_t len,uint64_t * tsc,size_t * rem) intel_pt_next_tsc() argument
4412 uint64_t tsc; intel_pt_ff_cb() local
4489 uint64_t tsc; intel_pt_fast_forward() local
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/linux/drivers/clocksource/
H A Dtimer-tegra186.c94 struct clocksource tsc; member
349 tsc); in tegra186_timer_tsc_read()
355 * The 56-bit value of the TSC is spread across two registers that are in tegra186_timer_tsc_read()
372 tegra->tsc.name = "tsc"; in tegra186_timer_tsc_init()
373 tegra->tsc.rating = 300; in tegra186_timer_tsc_init()
374 tegra->tsc.read = tegra186_timer_tsc_read; in tegra186_timer_tsc_init()
375 tegra->tsc.mask = CLOCKSOURCE_MASK(56); in tegra186_timer_tsc_init()
376 tegra->tsc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in tegra186_timer_tsc_init()
377 tegra->tsc.owner = THIS_MODULE; in tegra186_timer_tsc_init()
379 return clocksource_register_hz(&tegra->tsc, 31250000); in tegra186_timer_tsc_init()
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/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dnxp,lpc3220-tsc.yaml4 $id: http://devicetree.org/schemas/input/touchscreen/nxp,lpc3220-tsc.yaml#
7 title: NXP LPC32xx SoC Touchscreen Controller (TSC)
14 const: nxp,lpc3220-tsc
38 compatible = "nxp,lpc3220-tsc";
H A Dti,am3359-tsc.yaml4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
14 const: ti,am3359-tsc
69 tsc {
70 compatible = "ti,am3359-tsc";
/linux/tools/testing/selftests/prctl/
H A D.gitignore2 disable-tsc-ctxt-sw-stress-test
3 disable-tsc-on-off-stress-test
4 disable-tsc-test
H A DMakefile7 TEST_PROGS := disable-tsc-ctxt-sw-stress-test disable-tsc-on-off-stress-test \
8 disable-tsc-test set-anon-vma-name-test set-process-name
/linux/tools/testing/selftests/net/bench/
H A Dtest_bench_page_pool.sh19 …echo "${result}" | grep -o -E "no-softirq-page_pool01 Per elem: ([0-9]+) cycles\(tsc\) ([0-9]+\.[0…
23 …echo "${result}" | grep -o -E "no-softirq-page_pool02 Per elem: ([0-9]+) cycles\(tsc\) ([0-9]+\.[0…
27 …echo "${result}" | grep -o -E "no-softirq-page_pool03 Per elem: ([0-9]+) cycles\(tsc\) ([0-9]+\.[0…
/linux/tools/power/cpupower/debug/kernel/
H A Dcpufreq-test_tsc.c3 * test module to check whether the TSC-based delay routine continues
15 * 1.) pass clock=tsc to the kernel on your bootloader
20 * TSC-based delay routine on the Linux kernel does not correctly
110 MODULE_DESCRIPTION("Verify the TSC cpufreq notifier working correctly -- needs ACPI-enabled system"…
/linux/tools/power/x86/amd_pstate_tracer/
H A Damd_pstate_trace.py155 def store_csv(cpu_int, time_pre_dec, time_post_dec, min_perf, des_perf, max_perf, freq_ghz, mperf, aperf, tsc, common_comm, load, duration_ms, sample_num, elapsed_time, cpu_mask): argument
165 string_buffer = "CPU_%03u, %05u, %06u, %u, %u, %u, %.4f, %u, %u, %u, %.2f, %.3f, %u, %.3f, %s\n" % (cpu_int, int(time_pre_dec), int(time_post_dec), int(min_perf), int(des_perf), int(max_perf), freq_ghz, int(mperf), int(aperf), int(tsc), load, duration_ms, sample_num, elapsed_time, common_comm)
181 f_handle.write('common_cpu, common_secs, common_usecs, min_perf, des_perf, max_perf, freq, mperf, aperf, tsc, load, duration_ms, sample_num, elapsed_time, common_comm')
199 re.search(r'(^(.*?)\[)((\d+)[^\]])(.*?)(\d+)([.])(\d+)(.*?amd_min_perf=)(\d+)(.*?amd_des_perf=)(\d+)(.*?amd_max_perf=)(\d+)(.*?freq=)(\d+)(.*?mperf=)(\d+)(.*?aperf=)(\d+)(.*?tsc=)(\d+)'
215 tsc = search_obj.group(22)
232 load = Decimal(int(mperf)*100)/ Decimal(tsc)
234 store_csv(cpu_int, time_pre_dec, time_post_dec, min_perf, des_perf, max_perf, freq_ghz, mperf, aperf, tsc, common_comm, load, duration_ms, sample_num, elapsed_time, cpu_mask)
/linux/tools/testing/selftests/intel_pstate/
H A Daperf.c26 long long tsc, old_tsc, new_tsc; in main() local
82 tsc = new_tsc-old_tsc; in main()
91 printf("freq: %7.0f\n", tsc / (1.0*aperf / (1.0 * mperf)) / total); in main()
/linux/tools/power/x86/intel_pstate_tracer/
H A Dintel_pstate_tracer.py275 """ Plot all cpu tsc ghz """
280 g_plot('set ylabel "TSC Frequency (GHz)"')
281 …g_plot('set title "{} : cpu TSC Frequencies (Sanity check calculation) : {:%F %H:%M}"'.format(test…
326 … time_pre_dec, time_post_dec, core_busy, scaled, _from, _to, mperf, aperf, tsc, freq_ghz, io_boost… argument
336 …core_busy), int(scaled), int(_from), int(_to), int(mperf), int(aperf), int(tsc), freq_ghz, int(io_…
368 …common_secs, common_usecs, core_busy, scaled_busy, from, to, mperf, aperf, tsc, freq, boost, load,…
434 …aled=)(\d+)(.*?from=)(\d+)(.*?to=)(\d+)(.*?mperf=)(\d+)(.*?aperf=)(\d+)(.*?tsc=)(\d+)(.*?freq=)(\d…
450 tsc = search_obj.group(22)
473 load = Decimal(int(mperf)*100)/ Decimal(tsc)
479 tsc_ghz = Decimal(tsc)/duration_ms/Decimal(1000000)
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/linux/include/clocksource/
H A Dhyperv_timer.h51 * The protocol for reading Hyper-V TSC page is specified in Hypervisor in hv_read_tsc_page_tsc()
72 * TSC page. in hv_read_tsc_page_tsc()
82 * from TSC page. in hv_read_tsc_page_tsc()

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