Home
last modified time | relevance | path

Searched +full:trigger +full:- +full:address (Results 1 – 25 of 1140) sorted by relevance

12345678910>>...46

/linux/include/linux/dma/
H A Dsprd-dma.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * The Spreadtrum DMA controller supports channel 2-stage tansfer, that means
19 * trigger the destination channel's transaction automatically by hardware
22 * To support 2-stage tansfer, we must configure the channel mode and trigger
27 * enum sprd_dma_chn_mode: define the DMA channel mode for 2-stage transfer
29 * support the 2-stage transfer.
35 * Now the DMA controller can supports 2 groups 2-stage transfer.
46 * enum sprd_dma_trg_mode: define the DMA channel trigger mode for 2-stage
48 * @SPRD_DMA_NO_TRG: No trigger setting.
49 * @SPRD_DMA_FRAG_DONE_TRG: Trigger the transaction of destination channel
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-uevm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
7 #include "omap5-board-common.dtsi"
11 compatible = "ti,omap5-uevm", "ti,omap5";
18 reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
23 dsp_memory_region: dsp-memory@95000000 {
24 compatible = "shared-dma-pool";
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7768-1.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD7768-1 ADC device driver
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
18 const: adi,ad7768-1
26 clock-names:
29 trigger-sources:
[all …]
/linux/drivers/net/phy/
H A Ddp83640_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define PTP_TSTS 0x0017 /* PTP Trigger Status Register */
20 #define PTP_TXTS 0x001c /* PTP Transmit Timestamp Register, in four 16-bit reads */
21 #define PTP_RXTS 0x001d /* PTP Receive Timestamp Register, in six? 16-bit reads */
26 #define PTP_TRIG 0x0014 /* PTP Trigger Configuration Register */
57 #define TRIG_SEL_SHIFT (10) /* PTP Trigger Select */
59 #define TRIG_DIS (1<<9) /* Disable PTP Trigger */
60 #define TRIG_EN (1<<8) /* Enable PTP Trigger */
61 #define TRIG_READ (1<<7) /* Read PTP Trigger */
62 #define TRIG_LOAD (1<<6) /* Load PTP Trigger */
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm47081-luxul-xwr-1200.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
9 #include "bcm5301x-nand-cs0-bch4.dtsi"
12 compatible = "luxul,xwr-1200-v1", "brcm,bcm47081", "brcm,bcm4708";
13 model = "Luxul XWR-1200 V1";
29 #nvmem-cell-cells = <1>;
34 compatible = "gpio-leds";
36 led-power {
39 linux,default-trigger = "default-on";
42 led-lan3 {
[all …]
H A Dbcm47094-luxul-xwr-3150-v1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
9 #include "bcm5301x-nand-cs0-bch8.dtsi"
12 compatible = "luxul,xwr-3150-v1", "brcm,bcm47094", "brcm,bcm4708";
13 model = "Luxul XWR-3150 V1";
30 #nvmem-cell-cells = <1>;
35 compatible = "gpio-leds";
37 led-power {
40 linux,default-trigger = "default-on";
43 led-usb3 {
[all …]
H A Dbcm47094-dlink-dir-890l.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Device tree for D-Link DIR-890L
4 * D-Link calls this board "WRGAC36"
5 * this router has the same looks and form factor as D-Link DIR-885L.
7 * Some differences from DIR-885L include a separate USB2 port, separate LEDs
13 * Based on the device tree for DIR-885L
18 /dts-v1/;
21 #include "bcm5301x-nand-cs0-bch1.dtsi"
24 compatible = "dlink,dir-890l", "brcm,bcm47094", "brcm,bcm4708";
25 model = "D-Link DIR-890L";
[all …]
H A Dbcm53573.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
21 stdout-path = "serial0:115200n8";
25 #address-cells = <1>;
[all …]
H A Dbcm47094-linksys-panamera.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
9 #include "bcm5301x-nand-cs0-bch8.dtsi"
30 gpio-keys {
31 compatible = "gpio-keys";
33 button-wps {
39 button-rfkill {
45 button-reset {
53 compatible = "gpio-leds";
55 led-wps {
[all …]
H A Dbcm47094-luxul-xwr-3100.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
9 #include "bcm5301x-nand-cs0-bch4.dtsi"
12 compatible = "luxul,xwr-3100-v1", "brcm,bcm47094", "brcm,bcm4708";
13 model = "Luxul XWR-3100 V1";
30 #nvmem-cell-cells = <1>;
35 compatible = "gpio-leds";
37 led-power {
40 linux,default-trigger = "default-on";
43 led-lan3 {
[all …]
H A Dbcm47189-tenda-ac9.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
23 leds-0 {
24 compatible = "gpio-leds";
26 led-usb {
29 trigger-sources = <&ohci_port1>, <&ehci_port1>;
30 linux,default-trigger = "usbport";
33 led-wps {
38 led-5ghz {
43 led-system {
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
[all …]
/linux/arch/x86/kernel/acpi/
H A Dboot.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
22 #include <linux/efi-bgrt.h>
76 * ->device_hotplug_lock
77 * ->acpi_ioapic_lock
78 * ->ioapic_lock
80 * ->acpi_ioapic_lock
81 * ->ioapic_mutex
82 * ->ioapic_lock
87 /* --------------------------------------------------------------------------
[all …]
/linux/Documentation/firmware-guide/acpi/apei/
H A Deinj.rst1 .. SPDX-License-Identifier: GPL-2.0
15 which shows that the BIOS is exposing an EINJ table - it is the
43 - available_error_type
51 0x00000002 Processor Uncorrectable non-fatal
54 0x00000010 Memory Uncorrectable non-fatal
57 0x00000080 PCI Express Uncorrectable non-fatal
60 0x00000400 Platform Uncorrectable non-fatal
70 - error_type
75 - error_inject
77 Write any integer to this file to trigger the error injection. Make
[all …]
/linux/arch/m68k/include/asm/
H A Dmcfwdebug.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * mcfdebug.h -- ColdFire Debug Module support.
17 #define MCFDEBUG_BAAR 0x5 /* BDM address attribute */
18 #define MCFDEBUG_AATR 0x6 /* Address attribute trigger */
19 #define MCFDEBUG_TDR 0x7 /* Trigger definition */
22 #define MCFDEBUG_ABHR 0xc /* High address breakpoint */
23 #define MCFDEBUG_ABLR 0xd /* Low address breakpoint */
27 /* Define some handy constants for the trigger definition register */
51 #define MCFDEBUG_TDR_EAI1 0x00000010 /* Enable address BP inverted */
53 #define MCFDEBUG_TDR_EAR1 0x00000008 /* Enable address BP range */
[all …]
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-freecom-fsg-3.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Freecom FSG-3 router.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
14 model = "Freecom FSG-3";
15 compatible = "freecom,fsg-3", "intel,ixp42x";
16 #address-cells = <1>;
17 #size-cells = <1>;
28 stdout-path = "uart0:115200n8";
[all …]
H A Dintel-ixp42x-iomega-nas100d.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
13 compatible = "iom,nas-100d", "intel,ixp42x";
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-wlan {
[all …]
/linux/Documentation/devicetree/bindings/leds/
H A Dleds-lm3697.txt1 * Texas Instruments - LM3697 Highly Efficient White LED Driver
3 The LM3697 11-bit LED driver provides high-
10 - compatible:
12 - reg : I2C slave address
13 - #address-cells : 1
14 - #size-cells : 0
17 - enable-gpios : GPIO pin to enable/disable the device
18 - vled-supply : LED supply
21 - reg : 0 - LED is Controlled by bank A
22 1 - LED is Controlled by bank B
[all …]
/linux/include/uapi/linux/
H A Dfpga-dfl.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
38 * DFL_FPGA_GET_API_VERSION - _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 0)
47 * DFL_FPGA_CHECK_EXTENSION - _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 1)
58 * DFL_FPGA_PORT_RESET - _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 0)
64 * Return: 0 on success, -errno of failure
70 * DFL_FPGA_PORT_GET_INFO - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 1,
75 * Return: 0 on success, -errno on failure.
89 * FPGA_PORT_GET_REGION_INFO - _IOWR(FPGA_MAGIC, PORT_BASE + 2,
95 * Return: 0 on success, -errno on failure.
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ai_ml.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
13 compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
22 stdout-path = &lpuart2;
31 compatible = "gpio-leds";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_leds>;
35 user-led1 {
38 linux,default-trigger = "heartbeat";
41 user-led2 {
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2m.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * V2M-P1
8 * HBI-0190D
14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m-rs1.dtsi!
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
24 compatible = "simple-bus";
25 #address-cells = <1>;
26 #size-cells = <1>;
30 #interrupt-cells = <1>;
[all …]
H A Dvexpress-v2m-rs1.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * V2M-P1
8 * HBI-0190D
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
14 * original variant (vexpress-v2m.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m.dtsi!
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 v2m_fixed_3v3: regulator-3v3 {
24 compatible = "regulator-fixed";
25 regulator-name = "3V3";
[all …]

12345678910>>...46