| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-cs-r1r2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 8 clock-names = "apb_pclk"; 9 power-domains = <&scpi_devpd 0>; 10 out-ports { 13 remote-endpoint = <&etf1_in_port>; 17 in-ports { 27 compatible = "arm,coresight-tmc", "arm,primecell"; 31 clock-names = "apb_pclk"; 32 power-domains = <&scpi_devpd 0>; [all …]
|
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 #address-cells = <1>; 14 #size-cells = <1>; 18 frame-number = <1>; 30 #mbox-cells = <1>; 32 clock-names = "apb_pclk"; 36 compatible = "arm,mmu-400", "arm,smmu-v1"; [all …]
|
| /linux/Documentation/iio/ |
| H A D | iio_configfs.rst | 8 Configfs is a filesystem-based manager of kernel objects. IIO uses some 18 In order to use configfs support in IIO we need to select it at compile 24 $ mount -t configfs none /config 38 trigger types. A new trigger type is usually implemented as a separate 39 kernel module following the interface in include/linux/iio/sw_trigger.h:: 42 * drivers/iio/trigger/iio-trig-sample.c 59 * This undoes the actions in iio_trig_sample_probe 69 .name = "trig-sample", 77 iio-trig-sample module will create 'trig-sample' trigger type directory 78 /config/iio/triggers/trig-sample. [all …]
|
| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-cti-platform.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <dt-bindings/arm/coresight-cti-dt.h> 14 #include "coresight-cti.h" 15 #include "coresight-priv.h" 17 /* Number of CTI signals in the v8 architecturally defined connection */ 23 #define CTI_DT_CONNS "trig-conns" 26 #define CTI_DT_V8ARCH_COMPAT "arm,coresight-cti-v8-arch" 27 #define CTI_DT_CSDEV_ASSOC "arm,cs-dev-assoc" 28 #define CTI_DT_TRIGIN_SIGS "arm,trig-in-sigs" 29 #define CTI_DT_TRIGOUT_SIGS "arm,trig-out-sigs" [all …]
|
| H A D | coresight-cti.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 15 #include <linux/types.h> 17 #include "coresight-priv.h" 23 * 0x000 - 0x144: CTI programming and status 24 * 0xEDC - 0xEF8: CTI integration test. 25 * 0xF00 - 0xFFC: Coresight management registers. 44 #define ITCHOUT 0xEE4 /* WO RW-600 */ 45 #define ITTRIGOUT 0xEE8 /* WO RW-600 */ 56 * CTI CSSoc 400 has 8 IO triggers - other CTIs can be impl def. 57 * Max of in and out defined in the DEVID register. [all …]
|
| H A D | coresight-cti-core.c | 1 // SPDX-License-Identifier: GPL-2.0 22 #include "coresight-priv.h" 23 #include "coresight-cti.h" 30 * We assume that the non-CPU CTIs are always powered as we do with sinks etc. 33 * the same CTM, in general this is the case but does not always have to be. 43 dev_get_drvdata(csdev->dev.parent) 56 * CTI device name list - for CTI not bound to cores. 60 /* write set of regs to hardware - call with spinlock claimed */ 63 struct cti_config *config = &drvdata->config; in cti_write_all_hw_regs() 66 CS_UNLOCK(drvdata->base); in cti_write_all_hw_regs() [all …]
|
| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-pl022.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 13 - $ref: spi-controller.yaml# 14 - $ref: /schemas/arm/primecell.yaml# 23 - compatible 28 - const: arm,pl022 29 - const: arm,primecell [all …]
|
| /linux/drivers/iio/adc/ |
| H A D | ad_sigma_delta.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Support code for Analog Devices Sigma-Delta ADCs 6 * Author: Lars-Peter Clausen <lars@metafoo.de> 27 #include <linux/types.h> 31 #include <linux/iio/buffer-dmaengine.h> 47 * ad_sd_set_comm() - Set communications register 56 sigma_delta->comm = comm & AD_SD_COMM_CHAN_MASK; in ad_sd_set_comm() 61 * ad_sd_write_reg() - Write a register 65 * @size: Size of the register (0-3) 73 u8 *data = sigma_delta->tx_buf; in ad_sd_write_reg() [all …]
|
| H A D | mcp3911.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Driver for Microchip MCP3911, Two-channel Analog Front End 60 /* Internal voltage reference in mV */ 125 struct iio_trigger *trig; member 141 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read() 142 ret = spi_write_then_read(adc->spi, ®, 1, val, len); in mcp3911_read() 147 *val >>= ((4 - len) * 8); in mcp3911_read() 148 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val, in mcp3911_read() 155 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write() 157 val <<= (3 - len) * 8; in mcp3911_write() [all …]
|
| H A D | ad4170-4.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Analog Devices AD4170-4 ADC driver 6 * Author: Ana-Maria Cusco <ana-maria.cusco@analog.com> 17 #include <linux/clk-provider.h> 37 #include <linux/types.h> 81 /* AD4170_CONFIG_A_REG - INTERFACE_CONFIG_A REGISTER */ 246 [AD4170_CHAN_SETUP_REG(0) ... AD4170_CHAN_MAP_REG(AD4170_MAX_ADC_CHANNELS - 1)] = 2, 249 * also interleaved but MISC, AFE, FILTER, FILTER_FS, OFFSET are 16-bit 250 * while OFFSET, GAIN are 24-bit registers so we can't init them all to 278 AD4170_REF_BUF_PRE, /* Pre-charge referrence buffer */ [all …]
|
| /linux/drivers/net/wireless/intel/iwlwifi/ |
| H A D | iwl-dbg-tlv.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright (C) 2018-2025 Intel Corporation 6 #include "iwl-drv.h" 7 #include "iwl-trans.h" 8 #include "iwl-dbg-tlv.h" 13 * enum iwl_dbg_tlv_type - debug TLV types 24 IWL_UCODE_TLV_TYPE_DEBUG_INFO - IWL_UCODE_TLV_DEBUG_BASE, 34 * struct iwl_dbg_tlv_ver_data - debug TLV version struct 44 * struct iwl_dbg_tlv_timer_node - timer node struct 71 u32 len = le32_to_cpu(tlv->length); in iwl_dbg_tlv_add() [all …]
|
| /linux/drivers/iio/accel/ |
| H A D | mxc4005.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * 3-axis accelerometer driver for MXC4005XC Memsic sensor 14 #include <linux/types.h> 79 * MXC4005 can operate in the following ranges: 80 * +/- 2G, 4G, 8G (the default +/-2G) 82 * (2 + 2) * 9.81 / (2^12 - 1) = 0.009582 83 * (4 + 4) * 9.81 / (2^12 - 1) = 0.019164 84 * (8 + 8) * 9.81 / (2^12 - 1) = 0.038329 154 ret = regmap_bulk_read(data->regmap, MXC4005_REG_XOUT_UPPER, in mxc4005_read_xyz() 155 data->scan.chans, sizeof(data->scan.chans)); in mxc4005_read_xyz() [all …]
|
| H A D | kionix-kx022a.c | 1 // SPDX-License-Identifier: GPL-2.0-only 27 #include <linux/types.h> 39 #include "kionix-kx022a.h" 44 * 258 bytes of sample data. The quirk to know is that the amount of bytes in 99 * The HW does not set WHO_AM_I reg as read-only but we don't want to write it 100 * so we still include it in the read-only ranges. 279 struct iio_trigger *trig; member 293 * Prevent toggling the sensor stby/active state (PC1 bit) in the 317 return &data->orientation; in kx022a_get_mount_matrix() 403 * range is typically +-2G/4G/8G/16G, distributed over the amount of bits. [all …]
|
| H A D | mma7455_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * IIO accel core driver for Freescale MMA7455L 3-axis 10-bit accelerometer 7 * - 8-bit mode with different scales 8 * - INT1/INT2 interrupts 9 * - Offset calibration 10 * - Events 22 #include <linux/types.h> 46 * When MMA7455 is used in 10-bit it has a fullscale of -8g 47 * corresponding to raw value -512. The userspace interface 68 struct device *dev = regmap_get_device(mma7455->regmap); in mma7455_drdy() [all …]
|
| /linux/drivers/clk/bcm/ |
| H A D | clk-kona.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 16 #include <linux/clk-provider.h> 24 #define BAD_CLK_NAME ((const char *)-1) 33 #define FLAG_SET(obj, type, flag) ((obj)->flags |= FLAG(type, flag)) 34 #define FLAG_CLEAR(obj, type, flag) ((obj)->flags &= ~(FLAG(type, flag))) 35 #define FLAG_FLIP(obj, type, flag) ((obj)->flags ^= FLAG(type, flag)) 36 #define FLAG_TEST(obj, type, flag) (!!((obj)->flags & FLAG(type, flag))) 40 #define ccu_policy_exists(ccu_policy) ((ccu_policy)->enable.offset != 0) 44 #define policy_exists(policy) ((policy)->offset != 0) 55 #define hyst_exists(hyst) ((hyst)->offset != 0) [all …]
|
| /linux/drivers/acpi/ |
| H A D | resource.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * drivers/acpi/resource.c - ACPI device resources interpretation. 26 /* On X86 IO space is limited to the [0 - 64K] IO port range */ in acpi_iospace_resource_valid() 27 return res->end < 0x10003; in acpi_iospace_resource_valid() 33 * addresses mapping IO space in CPU physical address space, IO space 34 * resources can be placed anywhere in the 64-bit physical address space. 43 return ext_irq->resource_source.string_length == 0 && in is_gsi() 44 ext_irq->producer_consumer == ACPI_CONSUMER; in is_gsi() 55 u64 reslen = end - start + 1; in acpi_dev_resource_len_valid() 67 pr_debug("ACPI: invalid or unassigned resource %s [%016llx - %016llx] length [%016llx]\n", in acpi_dev_resource_len_valid() [all …]
|
| /linux/drivers/iio/addac/ |
| H A D | ad74413r.c | 1 // SPDX-License-Identifier: GPL-2.0 26 #include <linux/types.h> 29 #include <dt-bindings/iio/addac/adi,ad74413r.h> 67 * Synchronize consecutive operations when doing a one-shot 76 struct iio_trigger *trig; member 84 * transfer buffers to live in their own cache lines. 177 ad74413r_format_reg_write(reg, val, st->reg_tx_buf); in ad74413r_reg_write() 179 return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE); in ad74413r_reg_write() 187 dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n", in ad74413r_crc_check() 189 return -EINVAL; in ad74413r_crc_check() [all …]
|
| /linux/include/linux/ |
| H A D | leds.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 11 #include <dt-bindings/leds/common.h> 17 #include <linux/types.h> 47 * struct led_lookup_data - represents a single LED lookup entry 66 * with in-driver hard-coded LED names used as a fallback when 68 * in new LED class drivers. 79 * only LEDs exposed by drivers of hot-pluggable devices should 122 /* Brightness off also disables hw-blinking so it is a separate action */ 134 * Set LED brightness level immediately - it can block the caller for 143 * Activate hardware accelerated blink, delays are in milliseconds [all …]
|
| /linux/drivers/pinctrl/intel/ |
| H A D | pinctrl-baytrail.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013, Intel Corporation 18 #include <linux/types.h> 28 #include <linux/pinctrl/pinconf-generic.h> 30 #include "pinctrl-intel.h" 570 offset -= comm->pin_base; in byt_gpio_reg() 579 reg_offset = comm->pad_map[offset] * 16; in byt_gpio_reg() 583 return comm->pad_regs + reg_offset + reg; in byt_gpio_reg() 606 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n", in byt_set_group_simple_mux() 632 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n", in byt_set_group_mixed_mux() [all …]
|
| /linux/arch/x86/pci/ |
| H A D | irq.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Low-Level PCI Support for PC -- Routing of Interrupts 5 * (c) 1999--2000 Martin Mares <mj@ucw.cz> 8 #include <linux/types.h> 22 #include <asm/pc-conf-reg.h> 81 if (rt->signature != PIRQ_SIGNATURE || in pirq_check_routing_table() 82 rt->version != PIRQ_VERSION || in pirq_check_routing_table() 83 rt->size % 16 || in pirq_check_routing_table() 84 rt->size < sizeof(struct irq_routing_table) || in pirq_check_routing_table() 85 (limit && rt->size > limit - addr)) in pirq_check_routing_table() [all …]
|
| /linux/drivers/iio/chemical/ |
| H A D | scd4x.c | 1 // SPDX-License-Identifier: GPL-2.0 25 #include <linux/iio/types.h> 30 #include <linux/types.h> 76 struct i2c_client *client = state->client; in scd4x_i2c_xfer() 84 return -EIO; in scd4x_i2c_xfer() 93 return -EIO; in scd4x_i2c_xfer() 134 struct i2c_client *client = state->client; in scd4x_read() 165 dev_err(&client->dev, "CRC error\n"); in scd4x_read() 166 return -EIO; in scd4x_read() 223 struct i2c_client *client = state->client; in scd4x_write_and_fetch() [all …]
|
| /linux/drivers/iio/ |
| H A D | industrialio-buffer.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 * - Better memory allocation techniques? 10 * - Alternative access techniques? 18 #include <linux/dma-buf.h> 19 #include <linux/dma-fence.h> 20 #include <linux/dma-resv.h> 30 #include <linux/iio/iio-opaque.h> 72 return !list_empty(&buf->buffer_list); in iio_buffer_is_active() 77 return buf->access->data_available(buf); in iio_buffer_data_available() 83 if (!indio_dev->info->hwfifo_flush_to_buffer) in iio_buffer_flush_hwfifo() [all …]
|
| /linux/drivers/net/ethernet/atheros/alx/ |
| H A D | hw.h | 9 * This file is distributed in the hope that it will be useful, but 24 * copyright notice and this permission notice appear in all copies. 28 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 30 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 32 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 37 #include <linux/types.h> 43 /* Transmit Packet Descriptor, contains 4 32-bit words. 46 * +----------------+----------------+ 47 * | vlan-tag | buf length | 48 * +----------------+----------------+ [all …]
|
| /linux/drivers/comedi/drivers/ |
| H A D | das1800.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Comedi driver for Keithley DAS-1700/DAS-1800 series boards 6 * COMEDI - Linux Control and Measurement Device Interface 14 * Devices: [Keithley Metrabyte] DAS-1701ST (das-1701st), 15 * DAS-1701ST-DA (das-1701st-da), DAS-1701/AO (das-1701ao), 16 * DAS-1702ST (das-1702st), DAS-1702ST-DA (das-1702st-da), 17 * DAS-1702HR (das-1702hr), DAS-1702HR-DA (das-1702hr-da), 18 * DAS-1702/AO (das-1702ao), DAS-1801ST (das-1801st), 19 * DAS-1801ST-DA (das-1801st-da), DAS-1801HC (das-1801hc), 20 * DAS-1801AO (das-1801ao), DAS-1802ST (das-1802st), [all …]
|
| /linux/drivers/pinctrl/nomadik/ |
| H A D | pinctrl-nomadik-db8500.c | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <linux/types.h> 8 #include <linux/gpio/gpio-nomadik.h> 187 * column in the table of the data sheet and often used on schematics and 369 * mux in one group at a time by selecting the same altfunction for them 466 * This MSP cannot switch RX and TX, SCK in a separate group since this 533 /* This chip select pin can be "ps0" in alt C so have it separately */ 535 /* This chip select pin can be "ps1" in alt C so have it separately */ 572 /* Optional 4-bit Memory Stick interface */ 844 * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however [all …]
|