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/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra.h1 /* SPDX-License-Identifier: GPL-2.0-only */
47 /* argument: Integer, range is HW-dependant */
49 /* argument: Integer, range is HW-dependant */
51 /* argument: Integer, range is HW-dependant */
53 /* argument: Integer, range is HW-dependant */
55 /* argument: Integer, range is HW-dependant */
75 * struct tegra_function - Tegra pinctrl mux function
87 * struct tegra_pingroup - Tegra pin group
97 * @pupd_reg: Pull-up/down register offset.
98 * @pupd_bank: Pull-up/down register bank.
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/linux/scripts/kconfig/
H A Dsymbol.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
47 enum symbol_type type = sym->type; in sym_get_type()
74 * sym_get_choice_menu - get the parent choice menu if present
89 list_for_each_entry(m, &sym->menus, link) in sym_get_choice_menu()
90 if (m->prompt) { in sym_get_choice_menu()
99 menu = menu->parent; in sym_get_choice_menu()
100 } while (menu && !menu->sym); in sym_get_choice_menu()
102 if (menu && menu->sym && sym_is_choice(menu->sym)) in sym_get_choice_menu()
113 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_default_prop()
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H A Dexpr.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
38 * struct expr - expression
57 #define EXPR_NOT(dep) (2-(dep))
61 tristate tri; member
66 tristate tri; member
149 #define SYMBOL_WRITTEN 0x0800 /* track info to avoid double-write to .config */
188 struct property *next; /* next property - null if last */
190 const char *text; /* the prompt value - P_PROMPT, P_MENU, P_COMMENT */
201 for (st = sym->prop; st; st = st->next) \
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
21 for client device device tree nodes to map those state names to the pin
25 For example, a pin controller may set up its own "active" state when the
35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuration. Each state may also be
42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to define the set of state names that
47 pinctrl-0: List of phandles, each pointing at a pin configuration
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H A Dnvidia,tegra20-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-pinmux
19 - description: tri-state registers
20 - description: mux register
21 - description: pull-up/down registers
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/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_gpio.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
38 gpio->base.ctx
40 (gpio->regs->reg)
45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers()
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/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
61 #define BIST_ERROR_STATE 0x07 /* BIST engine internal state */
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
114 #define REG_SPI4_DBG_CNT(n) CRA(0x5,0x0,0x10+n) /* Debug counters 0-9 */
133 * tri-speed are only defined with the version that needs a port number.
140 /* 10GbE specific, and different from tri-speed */
147 #define REG_MAX_RXHIGH CRA(0x1,0xa,0x0a) /* XGMII lane 0-3 debug */
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/linux/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dfifo_monitor_local.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2010-2015, Intel Corporation.
88 /* The switch is tri-state */
/linux/arch/powerpc/platforms/pasemi/
H A Dgpio_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
9 * Based on drivers/net/fs_enet/mii-bitbang.c.
34 #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
35 #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
124 /* tri-state our MDIO I/O pin so we can read */ in gpio_mdio_read()
190 * Tri-state the MDIO line. in gpio_mdio_write()
202 /*nothing here - dunno how to reset it*/ in gpio_mdio_reset()
209 struct device *dev = &ofdev->dev; in gpio_mdio_probe()
210 struct device_node *np = ofdev->dev.of_node; in gpio_mdio_probe()
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/linux/drivers/atm/
H A Dsuni.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * drivers/atm/suni.h - S/UNI PHY driver
6 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
26 /* 0x08-0x0F reserved */
29 #define SUNI_RSOP_SBL 0x12 /* RSOP Section BIP-8 LSB */
30 #define SUNI_RSOP_SBM 0x13 /* RSOP Section BIP-8 MSB */
33 /* 0x16-0x17 reserved */
36 #define SUNI_RLOP_LBL 0x1A /* RLOP Line BIP-8/24 LSB */
37 #define SUNI_RLOP_LB 0x1B /* RLOP Line BIP-8/24 */
38 #define SUNI_RLOP_LBM 0x1C /* RLOP Line BIP-8/24 MSB */
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/linux/drivers/media/dvb-frontends/
H A Ddib0070.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
31 u8 osc_buffer_state; /* 0= normal, 1= tri-state */
35 u8 invert_iq; /* invert Q - in case I or Q is inverted on the board */
37 u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
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/linux/drivers/pcmcia/
H A Dvg468.h72 #define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */
78 #define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */
89 #define VG468_MISC_GPIO 0x04 /* General-purpose IO */
90 #define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */
/linux/drivers/tty/serial/8250/
H A D8250_exar.c1 // SPDX-License-Identifier: GPL-2.0
3 * Probe module for 8250/16550-type Exar chips PCI serial ports.
111 #define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */
112 #define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */
130 #define UART_EXAR_DLD_485_POLARITY 0x80 /* RS-485 Enable Signal Polarity */
149 * ---- ---- --------
153 * 3 - <reserved>
157 * 7 - <reserved>
160 * 10 - Red LED
161 * 11..15 - <unused>
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/linux/drivers/parport/
H A Dparport_gsc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Low-level parallel-support for PC-style hardware integrated in the
4 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
6 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
36 #include <asm/parisc-device.h>
42 MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
78 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0); in parport_gsc_init_state()
83 s->u.pc.ctr = parport_readb (CONTROL (p)); in parport_gsc_save_state()
88 parport_writeb (s->u.pc.ctr, CONTROL (p)); in parport_gsc_restore_state()
128 /* --- Mode detection ------------------------------------- */
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/linux/drivers/media/i2c/
H A Dov772x.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
26 #include <linux/v4l2-mediabus.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
41 #define GAIN 0x00 /* AGC - Gain control gain setting */
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/linux/Documentation/arch/riscv/
H A Dvector.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Vector Extension Support for RISC-V Linux
8 order to support the use of the RISC-V Vector Extension.
11 ---------------------
19 are not portable to non-Linux, nor non-RISC-V environments, so it is discourage
27 argument consists of two 2-bit enablement statuses and a bit for inheritance
30 Enablement status is a tri-state value each occupying 2-bit of space in
33 * :c:macro:`PR_RISCV_V_VSTATE_CTRL_DEFAULT`: Use the system-wide default
34 enablement status on execve(). The system-wide default setting can be
43 arg: The control argument is a 5-bit value consisting of 3 parts, and
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/linux/drivers/gpio/
H A Dgpio-xilinx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2008 - 2013 Xilinx, Inc.
45 * struct xgpio_instance - Stores information about GPIO device
50 * @state: GPIO write state shadow register
51 * @last_irq_read: GPIO read state register from last interrupt
65 DECLARE_BITMAP(state, 64);
78 return bitmap_bitremap(bit, chip->hw_map, chip->sw_map, 64); in xgpio_from_bit()
83 return bitmap_bitremap(gpio, chip->sw_map, chip->hw_map, 64); in xgpio_to_bit()
111 return -EINVAL; in xgpio_regoffset()
117 void __iomem *addr = chip->regs + reg + xgpio_regoffset(chip, bit / 32); in xgpio_read_ch()
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/linux/drivers/usb/serial/
H A Dkeyspan_usa67msg.h1 /* SPDX-License-Identifier: BSD-3-Clause */
5 Copyright (c) 1998-2007 InnoSys Incorporated. All Rights Reserved
6 This file is available under a BSD-style copyright
19 Copyright (c) 1998-2007 InnoSys Incorporated. All Rights Reserved
21 This file is available under a BSD-style copyright
48 USB OUT (host -> USAxx, transmit) messages contain a
56 USB IN (USAxx -> host, receive) messages begin with a status
106 2000jun01 add extended BSD-style copyright text
145 // host requests TX tri-state be set
153 prescaler; // specified as N/8; values 8-ff are valid
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H A Dkeyspan_usa26msg.h1 /* SPDX-License-Identifier: BSD-3-Clause */
5 Copyright (C) 1998-2000 InnoSys Incorporated. All Rights Reserved
6 This file is available under a BSD-style copyright
19 Copyright (C) 1998-2000 InnoSys Incorporated. All Rights Reserved
21 This file is available under a BSD-style copyright
44 USB OUT (host -> USAxx, transmit) messages contain a
52 USB IN (USAxx -> host, receive) messages begin with a status
102 2000jun01 add extended BSD-style copyright text
145 // USA26: host requests TX tri-state be set
155 prescaler; // BOTH: specified as N/8; values 8-ff are valid
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/linux/drivers/comedi/drivers/
H A Dpcm3724.c1 // SPDX-License-Identifier: GPL-2.0
4 * Comedi driver for Advantech PCM-3724 Digital I/O board
11 * Description: Advantech PCM-3724
12 * Devices: [Advantech] PCM-3724 (pcm3724)
16 * This is driver for digital I/O boards PCM-3724 with 48 DIO.
23 * [0] - I/O port base address
33 * This board has two standard 8255 devices that provide six 8-bit DIO ports
36 * bidirectional, tri-state line buffer, two additional I/O ports are used
65 if (s->io_bits & 0x0000ff) { in compute_buffer()
71 if (s->io_bits & 0x00ff00) { in compute_buffer()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3326-anbernic-rg351m.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
21 stdout-path = "serial2:115200n8";
25 compatible = "pwm-backlight";
26 power-supply = <&vcc_bl>;
31 * LED is a tri-state. Driven high it is red, driven low it is
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998-clamshell.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 vph_pwr: vph-pwr-regulator {
16 compatible = "regulator-fixed";
17 regulator-name = "vph_pwr";
18 regulator-always-on;
19 regulator-boot-on;
27 compatible = "qcom,wcn3990-bt";
29 vddio-supply = <&vreg_s4a_1p8>;
30 vddxo-supply = <&vreg_l7a_1p8>;
31 vddrf-supply = <&vreg_l17a_1p3>;
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/linux/drivers/clk/
H A Dclk-tps68470.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/clk-provider.h>
26 #define TPS68470_CLK_NAME "tps68470-clk"
80 if (regmap_read(clkdata->regmap, TPS68470_REG_PLLCTL, &val)) in tps68470_clk_is_prepared()
90 regmap_write(clkdata->regmap, TPS68470_REG_CLKCFG1, in tps68470_clk_prepare()
94 regmap_update_bits(clkdata->regmap, TPS68470_REG_PLLCTL, in tps68470_clk_prepare()
111 regmap_update_bits(clkdata->regmap, TPS68470_REG_PLLCTL, TPS68470_PLL_EN_MASK, 0); in tps68470_clk_unprepare()
113 /* ... and then tri-state the clock outputs. */ in tps68470_clk_unprepare()
114 regmap_write(clkdata->regmap, TPS68470_REG_CLKCFG1, 0); in tps68470_clk_unprepare()
121 return clkdata->rate; in tps68470_clk_recalc_rate()
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/linux/drivers/net/ethernet/brocade/bna/
H A Dbfa_defs_cna.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
47 u64 bbsc_frames_lost; /*!< Credit Recovery-Frames Lost */
48 u64 bbsc_credits_lost; /*!< Credit Recovery-Credits Lost */
49 u64 bbsc_link_resets; /*!< Credit Recovery-Link Resets */
56 u64 frame_65_127; /*!< Frames 65-127 bytes */
57 u64 frame_128_255; /*!< Frames 128-255 bytes */
58 u64 frame_256_511; /*!< Frames 256-511 bytes */
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