/linux/drivers/gpu/drm/tegra/ |
H A D | dp.c | 437 * @train: DisplayPort link training state 439 void drm_dp_link_train_init(struct drm_dp_link_train *train) in drm_dp_link_train_init() argument 441 struct drm_dp_link_train_set *request = &train->request; in drm_dp_link_train_init() 442 struct drm_dp_link_train_set *adjust = &train->adjust; in drm_dp_link_train_init() 456 train->pattern = DP_TRAINING_PATTERN_DISABLE; in drm_dp_link_train_init() 457 train->clock_recovered = false; in drm_dp_link_train_init() 458 train->channel_equalized = false; in drm_dp_link_train_init() 461 static bool drm_dp_link_train_valid(const struct drm_dp_link_train *train) in drm_dp_link_train_valid() argument 463 return train->clock_recovered && train->channel_equalized; in drm_dp_link_train_valid() 468 struct drm_dp_link_train_set *request = &link->train.request; in drm_dp_link_apply_training() [all …]
|
H A D | dp.h | 157 * @train: DP link training state 159 struct drm_dp_link_train train; member 174 void drm_dp_link_train_init(struct drm_dp_link_train *train);
|
/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_fdi.c | 480 /* enable normal train */ in intel_fdi_normal_train() 532 /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit in ilk_fdi_link_train() 533 for train result */ in ilk_fdi_link_train() 572 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train() 578 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in ilk_fdi_link_train() 580 /* Train 2 */ in ilk_fdi_link_train() 596 drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n"); in ilk_fdi_link_train() 601 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in ilk_fdi_link_train() 603 drm_dbg_kms(&dev_priv->drm, "FDI train done\n"); in ilk_fdi_link_train() 631 /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit in gen6_fdi_link_train() [all …]
|
H A D | intel_fdi_regs.h | 85 /* train, dp width same as FDI_TX */ 130 #define FDI_RX_SYMBOL_LOCK (1 << 9) /* train 2 */ 131 #define FDI_RX_BIT_LOCK (1 << 8) /* train 1 */
|
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
H A D | ramgt215.c | 100 gt215_link_train_calc(u32 *vals, struct gt215_ltrain *train) in gt215_link_train_calc() argument 138 train->r_100720 = 0; in gt215_link_train_calc() 143 train->r_100720 |= ((median[i] & 0x0f) << (i << 2)); in gt215_link_train_calc() 146 train->r_1111e0 = 0x02000000 | (bin * 0x101); in gt215_link_train_calc() 147 train->r_111400 = 0x0; in gt215_link_train_calc() 156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train() local 178 train->state = NVA3_TRAIN_EXEC; in gt215_link_train() 200 /* XXX: Magic writes that improve train reliability? */ in gt215_link_train() 223 ram_wr32(fuc, 0x100720, train->r_100720); in gt215_link_train() 224 ram_wr32(fuc, 0x1111e0, train->r_1111e0); in gt215_link_train() [all …]
|
H A D | ramgk104.c | 1272 struct gk104_ram_train *train) in gk104_ram_train_type() argument 1278 struct nvbios_M0209S *remap = &train->remap; in gk104_ram_train_type() 1288 case 0x00: value = &train->type00; break; in gk104_ram_train_type() 1289 case 0x01: value = &train->type01; break; in gk104_ram_train_type() 1290 case 0x04: value = &train->type04; break; in gk104_ram_train_type() 1291 case 0x06: value = &train->type06; break; in gk104_ram_train_type() 1292 case 0x07: value = &train->type07; break; in gk104_ram_train_type() 1293 case 0x08: value = &train->type08; break; in gk104_ram_train_type() 1294 case 0x09: value = &train->type09; break; in gk104_ram_train_type() 1327 train->mask |= 1 << M0205E.type; in gk104_ram_train_type() [all …]
|
/linux/Documentation/devicetree/bindings/net/ |
H A D | motorcomm,yt8xxx.yaml | 98 Transmit PHY Clock delay train configuration when speed is 10Mbps. 104 Transmit PHY Clock delay train configuration when speed is 100Mbps. 110 Transmit PHY Clock delay train configuration when speed is 1000Mbps.
|
/linux/Documentation/dev-tools/ |
H A D | propeller.rst | 24 "build-afdo - train-afdo - build-propeller - train-propeller -
|
/linux/net/ipv4/ |
H A D | tcp_cdg.c | 54 "(0: disabled, 1: ACK train, 2: delay threshold, 3: both)"); 135 * o Using a usec clock for the ACK train. 136 * o Reset ACK train when application limited.
|
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
H A D | dp.c | 351 /* Attempt to train the link in this configuration. */ in nvkm_dp_train_link() 421 OUTP_ERR(outp, "train failed with %d", ret); in nvkm_dp_train_links() 429 /* Attempt to train the link in this configuration. */ in nvkm_dp_train_links() 629 .dp.train = nvkm_dp_train,
|
H A D | outp.h | 112 int (*train)(struct nvkm_outp *, bool retrain); member
|
H A D | uoutp.c | 114 if (!outp->func->dp.train) in nvkm_uoutp_mthd_dp_train() 126 return outp->func->dp.train(outp, args->v0.retrain); in nvkm_uoutp_mthd_dp_train()
|
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_dp_training_dpia.h | 34 /* Train DP tunneling link for USB4 DPIA display endpoint.
|
H A D | link_dp_phy.c | 140 * The policy is to always train with FEC in dp_set_fec_ready()
|
/linux/drivers/gpu/drm/xlnx/ |
H A D | zynqmp_dp.c | 690 * zynqmp_dp_adjust_train - Adjust train values 739 u8 train = train_set[i]; in zynqmp_dp_update_vs_emph() local 741 opts.dp.voltage[0] = (train & DP_TRAIN_VOLTAGE_SWING_MASK) in zynqmp_dp_update_vs_emph() 743 opts.dp.pre[0] = (train & DP_TRAIN_PRE_EMPHASIS_MASK) in zynqmp_dp_update_vs_emph() 755 * zynqmp_dp_link_train_cr - Train clock recovery 758 * Return: 0 if clock recovery train is done successfully, or corresponding 821 * zynqmp_dp_link_train_ce - Train channel equalization 824 * Return: 0 if channel equalization train is done successfully, or 940 * zynqmp_dp_train - Train the link 984 * Train the link by downshifting the link rate if training is not successful. [all …]
|
/linux/Documentation/devicetree/bindings/pwm/ |
H A D | microchip,corepwm.yaml | 57 a minimum period pulse train whose High/Low average is that of the chosen duty
|
/linux/drivers/gpu/drm/gma500/ |
H A D | cdv_intel_dp.c | 1496 DRM_DEBUG_KMS("Start train\n"); in cdv_intel_dp_start_link_train() 1501 DRM_DEBUG_KMS("DP Link Train Set %x, Link_config %x, %x\n", in cdv_intel_dp_start_link_train() 1523 DRM_DEBUG_KMS("PT1 train is done\n"); in cdv_intel_dp_start_link_train() 1550 DRM_DEBUG_KMS("failure in DP pattern 1 training, train set %x\n", intel_dp->train_set[0]); in cdv_intel_dp_start_link_train() 1574 DRM_DEBUG_KMS("DP Link Train Set %x, Link_config %x, %x\n", in cdv_intel_dp_complete_link_train() 1587 DRM_ERROR("failed to train DP, aborting\n"); in cdv_intel_dp_complete_link_train() 1612 DRM_DEBUG_KMS("PT2 train is done\n"); in cdv_intel_dp_complete_link_train()
|
/linux/drivers/gpu/drm/mediatek/ |
H A D | mtk_dp.c | 1617 "Link train target_link_rate = 0x%x, target_lane_count = 0x%x\n", in mtk_dp_train_setting() 1653 dev_dbg(mtk_dp->dev, "Link train CR pass\n"); in mtk_dp_train_cr() 1673 dev_dbg(mtk_dp->dev, "Link train CR fail\n"); in mtk_dp_train_cr() 1686 /* Failed to train CR, and disable pattern. */ in mtk_dp_train_cr() 1720 dev_dbg(mtk_dp->dev, "Link train EQ pass\n"); in mtk_dp_train_eq() 1728 dev_dbg(mtk_dp->dev, "Link train EQ fail\n"); in mtk_dp_train_eq() 1731 /* Failed to train EQ, and disable pattern. */ in mtk_dp_train_eq()
|
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
H A D | memx.c | 161 nvkm_debug(&memx->pmu->subdev, " MEM TRAIN\n"); in nvkm_memx_train()
|
/linux/tools/testing/selftests/bpf/progs/ |
H A D | bpf_cubic.c | 463 /* first detection parameter - ack-train detection */ in hystart_update() 469 /* Hystart ack train triggers if we get ack past in hystart_update()
|
/linux/drivers/gpu/drm/rockchip/ |
H A D | cdn-dp-core.c | 635 DRM_DEV_ERROR(dp->dev, "Failed link train %d\n", ret); in cdn_dp_encoder_enable() 982 /* Enabled and connected with a sink, re-train if requested */ in cdn_dp_pd_event_work() 988 DRM_DEV_INFO(dp->dev, "Connected with sink; re-train link\n"); in cdn_dp_pd_event_work()
|
/linux/include/linux/ |
H A D | vga_switcheroo.h | 45 * GPU needs to train the link and communicate the link parameters to the
|
/linux/Documentation/admin-guide/hw-vuln/ |
H A D | srso.rst | 20 but the concern is that an attacker can mis-train the CPU BTB to predict
|
/linux/drivers/gpu/drm/bridge/ |
H A D | ite-it6505.c | 1725 DRM_DEV_DEBUG_DRIVER(dev, "auto train fail, will step train"); in it6505_parse_link_capabilities() 2325 DRM_DEV_DEBUG_DRIVER(dev, "link train not done or no video"); in it6505_hdcp_work() 2407 DRM_DEV_DEBUG_DRIVER(dev, "Start step train"); in it6505_link_step_train_process() 2418 DRM_DEV_DEBUG_DRIVER(dev, "not support step train"); in it6505_link_step_train_process() 2426 DRM_DEV_DEBUG_DRIVER(dev, "step train %s, retry:%d times", in it6505_link_step_train_process() 2461 DRM_DEV_DEBUG_DRIVER(dev, "auto train %s, auto_train_retry: %d", in it6505_link_training_work()
|
/linux/Documentation/networking/ |
H A D | snmp_counter.rst | 535 approached. The two pieces of information are ACK train length and 537 `Hybrid Slow Start paper`_. Either ACK train length or packet delay 548 How many times the ACK train length threshold is detected 552 The sum of CWND detected by ACK train length. Dividing this value by 554 ACK train length.
|