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/linux/Documentation/devicetree/bindings/iio/dac/
H A Dadi,ltc2688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2688 16 channel, 16 bit, +-15V DAC
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2688.pdf
19 - adi,ltc2688
24 vcc-supply:
25 description: Analog Supply Voltage Input.
27 iovcc-supply:
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/linux/drivers/iio/dac/
H A Dltc2688.c1 // SPDX-License-Identifier: GPL-2.0
54 #define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1)
55 #define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1)
106 .tx_buf = st->tx_data, in ltc2688_spi_read()
111 .tx_buf = st->tx_data + 3, in ltc2688_spi_read()
112 .rx_buf = st->rx_data, in ltc2688_spi_read()
119 memcpy(st->tx_data, reg, reg_size); in ltc2688_spi_read()
121 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); in ltc2688_spi_read()
125 memcpy(val, &st->rx_data[1], val_size); in ltc2688_spi_read()
134 return spi_write(st->spi, data, count); in ltc2688_spi_write()
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/linux/drivers/video/fbdev/mmp/hw/
H A Dmmp_ctrl.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 /* ------------< LCD register >------------ */
150 #define LCD_SCLK(path) ((PATH_PN == path->id) ? LCD_CFG_SCLK_DIV :\
151 ((PATH_TV == path->id) ? LCD_TCLK_DIV : LCD_PN2_SCLK_DIV))
155 /* dither configure */
170 /* dither table data was fixed by video bpp of input and output*/
367 /* I/O Pads Input Read Only Register */
386 #define CFG_RXBITS(rx) (((rx) - 1)<<16) /* 0x1F~0x1 */
388 #define CFG_TXBITS(tx) (((tx) - 1)<<8) /* 0x1F~0x1 */
411 1. Smart Pannel 8-bit Bus Control Register.
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/linux/sound/soc/codecs/
H A Dmax98090.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
5 * Copyright 2011-2012 Maxim Integrated Products
38 { 0x0D, 0x00 }, /* 0D Input Config */
39 { 0x0E, 0x1B }, /* 0E Line Input Level */
42 { 0x10, 0x14 }, /* 10 Mic1 Input Level */
43 { 0x11, 0x14 }, /* 11 Mic2 Input Level */
90 { 0x3E, 0x00 }, /* 3E Input Enable */
279 /* Reset the codec by writing to this write-only reset register */ in max98090_reset()
280 ret = regmap_write(max98090->regmap, M98090_REG_SOFTWARE_RESET, in max98090_reset()
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