/freebsd/sys/contrib/device-tree/Bindings/thermal/ |
H A D | qoriq-thermal.txt | 1 * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs 4 - compatible : Must include "fsl,qoriq-tmu" or "fsl,imx8mq-tmu". The 5 version of the device is determined by the TMU IP Block Revision 9 ---------- ----- 11 - reg : Address range of TMU registers. 12 - interrupts : Contains the interrupt for TMU. 13 - fsl,tmu-range : The values to be programmed into TTRnCR, as specified by 16 - fsl,tmu-calibration : A list of cell pairs containing temperature 20 - #thermal-sensor-cells : Must be 1. The sensor specifier is the monitoring 24 - little-endian : If present, the TMU registers are little endian. If absent, [all …]
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H A D | qoriq-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 12 - Fabio Estevam <festevam@gmail.com> 14 $ref: thermal-sensor.yaml# 19 The version of the device is determined by the TMU IP Block Revision [all …]
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H A D | exynos-thermal.txt | 1 * Exynos Thermal Management Unit (TMU) 5 - compatible : One of the following: 6 "samsung,exynos3250-tmu" 7 "samsung,exynos4412-tmu" 8 "samsung,exynos4210-tmu" 9 "samsung,exynos5250-tmu" 10 "samsung,exynos5260-tmu" 11 "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420 12 "samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4 14 "samsung,exynos5433-tmu" [all …]
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/freebsd/sys/arm64/qoriq/ |
H A D | qoriq_therm.c | 1 /*- 3 * SPDX-License-Identifier: BSD-2-Clause 116 { 0, "cpu-thermal", 0 }, 121 { 0, "ddr-controller", 0 }, 122 { 1, "core-cluster", 1 }, 127 { 0, "ddr-controller", 0 }, 130 { 3, "core-cluster", 3 }, 135 { 0, "ddr-controller", 0 }, 138 { 3, "core-cluster", 3 }, 144 { 0, "core-cluster", 0 }, [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | t1023si-post.dtsi | 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; 60 compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; [all …]
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H A D | t1040si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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H A D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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H A D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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H A D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree Include file for Layerscape-LX2160A family SoC. 5 // Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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H A D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/ |
H A D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/ |
H A D | r8a779f0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC 8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779f0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 cluster01_opp: opp-table-0 { 18 compatible = "operating-points-v2"; 19 opp-shared; [all …]
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H A D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3H (R8A77980) SoC 9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/r8a77980-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 19 /* External CAN clock - to be overridden by boards that provide it */ 21 compatible = "fixed-clock"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/renesas/ |
H A D | r8a7794.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E2 (R8A77940) SoC 9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a7794-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; [all …]
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H A D | r8a7790.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car H2 (R8A77900) SoC 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/power/r8a7790-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 46 compatible = "fixed-clock"; [all …]
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H A D | r8a7742.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/power/r8a7742-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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H A D | r8a7743.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7743-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; [all …]
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H A D | r8a7744.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7744-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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H A D | r8a7745.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11 #include <dt-bindings/power/r8a7745-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; [all …]
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H A D | r8a7791.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/power/r8a7791-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 24 interrupt-parent = <&gic>; 26 arm-a53-pmu { 27 compatible = "arm,cortex-a53-pmu"; 32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 35 arm-a57-pmu { [all …]
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