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/linux/arch/arm/mach-at91/
H A Dpm_suspend.S23 tmp1 .req r4 label
85 mcr p15, 0, tmp1, c7, c0, 4
104 * Side effects: overwrites r2, r3, tmp1, tmp2, tmp3, r7
114 ldr tmp1, [r2, #UDDRC_PCTRL_0]
115 bic tmp1, tmp1, #0x1
116 str tmp1, [r2, #UDDRC_PCTRL_0]
118 ldr tmp1, [r2, #UDDRC_PCTRL_1]
119 bic tmp1, tmp1, #0x1
120 str tmp1, [r2, #UDDRC_PCTRL_1]
122 ldr tmp1, [r2, #UDDRC_PCTRL_2]
[all …]
/linux/arch/arm64/include/asm/
H A Dasm_pointer_auth.h12 .macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
13 mov \tmp1, #THREAD_KEYS_KERNEL
14 add \tmp1, \tsk, \tmp1
15 ldp \tmp2, \tmp3, [\tmp1, #PTRAUTH_KERNEL_KEY_APIA]
20 .macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
22 __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3
26 .macro ptrauth_keys_install_kernel tsk, tmp1, tmp2, tmp3
28 __ptrauth_keys_install_kernel_nosync \tsk, \tmp1, \tmp2, \tmp3
35 .macro __ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
38 .macro ptrauth_keys_install_kernel_nosync tsk, tmp1, tmp2, tmp3
[all …]
H A Del2_setup.h466 // This will clobber tmp1 and tmp2, and expect tmp1 to contain
468 .macro __check_override idreg, fld, width, pass, fail, tmp1, tmp2
469 ubfx \tmp1, \tmp1, #\fld, #\width
470 cbz \tmp1, \fail
472 adr_l \tmp1, \idreg\()_override
473 ldr \tmp2, [\tmp1, FTR_OVR_VAL_OFFSET]
474 ldr \tmp1, [\tmp1, FTR_OVR_MASK_OFFSET]
476 ubfx \tmp1, \tmp1, #\fld, #\width
477 cmp \tmp1, xzr
478 and \tmp2, \tmp2, \tmp1
[all …]
/linux/arch/sparc/include/asm/
H A Dhead_64.h35 #define BRANCH_IF_SUN4V(tmp1,label) \ argument
36 sethi %hi(is_sun4v), %tmp1; \
37 lduw [%tmp1 + %lo(is_sun4v)], %tmp1; \
38 brnz,pn %tmp1, label; \
41 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ argument
42 rdpr %ver, %tmp1; \
44 srlx %tmp1, 32, %tmp1; \
46 cmp %tmp1, %tmp2; \
50 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ argument
51 rdpr %ver, %tmp1; \
[all …]
/linux/arch/arm/mach-tegra/
H A Dsleep.h81 .macro check_cpu_part_num part_num, tmp1, tmp2
82 mrc p15, 0, \tmp1, c0, c0, 0
83 ubfx \tmp1, \tmp1, #4, #12
85 cmp \tmp1, \tmp2
89 .macro exit_smp, tmp1, tmp2
90 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
91 bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW
92 mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR
95 check_cpu_part_num 0xc09, \tmp1, \tmp2
96 mrceq p15, 0, \tmp1, c0, c0, 5
[all …]
/linux/arch/arm64/lib/
H A Dstrlen.S30 #define tmp1 x4 macro
83 and tmp1, srcin, MIN_PAGE_SIZE - 1
85 cmp tmp1, MIN_PAGE_SIZE - 16
96 sub tmp1, data1, zeroones
100 bics has_nul1, tmp1, tmp2
109 clz tmp1, has_nul1
111 add len, len, tmp1, lsr 3
124 sub tmp1, data1, zeroones
126 orr tmp2, tmp1, tmp3
130 sub tmp1, data1, zeroones
[all …]
H A Dcsum.c63 __uint128_t tmp1, tmp2, tmp3, tmp4; in do_csum() local
65 tmp1 = *(__uint128_t *)ptr; in do_csum()
74 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
78 tmp1 = ((tmp1 >> 64) << 64) | (tmp2 >> 64); in do_csum()
79 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
82 tmp1 = ((tmp1 >> 64) << 64) | (tmp3 >> 64); in do_csum()
83 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
84 tmp1 = ((tmp1 >> 64) << 64) | sum64; in do_csum()
85 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
86 sum64 = tmp1 >> 64; in do_csum()
H A Dstrnlen.S38 tmp1 .req x8 label
54 ands tmp1, srcin, #15
74 sub tmp1, data1, zeroones
78 bic has_nul1, tmp1, tmp2
81 orr tmp1, has_nul1, has_nul2
82 ccmp tmp1, #0, #0, pl /* NZCV = 0000 */
85 cbz tmp1, .Lhit_limit /* No null in final Qword. */
106 CPU_BE( sub tmp1, data2, zeroones )
108 CPU_BE( bic has_nul2, tmp1, tmp2 )
124 * limit + tmp1 - 1 as a 65-bit value before shifting it;
[all …]
H A Dstrncmp.S37 #define tmp1 x8 macro
63 eor tmp1, src1, src2
65 tst tmp1, #7
79 sub tmp1, data1, zeroones
83 bics has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */
111 add tmp1, limit, 8
114 lsl limit, tmp1, #3 /* Bits -> bytes. */
138 sub tmp1, tmp3, zeroones
140 bic has_nul, tmp1, tmp2
238 ldp tmp1, tmp2, [src2], #16
[all …]
/linux/arch/loongarch/include/asm/
H A Dasmmacro.h70 .macro fpu_restore_csr thread tmp0 tmp1
84 la.pcrel \tmp1, 1f
85 alsl.d \tmp1, \tmp0, \tmp1, 3
86 jr \tmp1
108 .macro fpu_save_cc thread tmp0 tmp1
110 move \tmp1, \tmp0
112 bstrins.w \tmp1, \tmp0, 15, 8
114 bstrins.w \tmp1, \tmp0, 23, 16
116 bstrins.w \tmp1, \tmp0, 31, 24
117 st.w \tmp1, \thread, THREAD_FCC
[all …]
/linux/arch/loongarch/lib/
H A Dcsum.c61 __uint128_t tmp1, tmp2, tmp3, tmp4; in do_csum() local
63 tmp1 = *(__uint128_t *)ptr; in do_csum()
72 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
76 tmp1 = ((tmp1 >> 64) << 64) | (tmp2 >> 64); in do_csum()
77 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
80 tmp1 = ((tmp1 >> 64) << 64) | (tmp3 >> 64); in do_csum()
81 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
82 tmp1 = ((tmp1 >> 64) << 64) | sum64; in do_csum()
83 tmp1 += (tmp1 >> 64) | (tmp1 << 64); in do_csum()
84 sum64 = tmp1 >> 64; in do_csum()
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dmmap.c24 void *bss_mmaped = NULL, *map_mmaped = NULL, *tmp0, *tmp1, *tmp2; in test_mmap() local
55 tmp1 = mmap(NULL, page_size, PROT_READ | PROT_WRITE, MAP_SHARED, rdmap_fd, 0); in test_mmap()
56 if (CHECK(tmp1 != MAP_FAILED, "rdonly_write_mmap", "unexpected success\n")) { in test_mmap()
57 munmap(tmp1, page_size); in test_mmap()
61 tmp1 = mmap(NULL, page_size, PROT_READ, MAP_SHARED, rdmap_fd, 0); in test_mmap()
62 if (CHECK(tmp1 == MAP_FAILED, "rdonly_read_mmap", "failed: %d\n", errno)) in test_mmap()
180 tmp1 = mmap(NULL, map_sz, PROT_READ | PROT_WRITE, MAP_SHARED, in test_mmap()
182 if (CHECK(tmp1 != MAP_FAILED, "data_mmap", "mmap succeeded\n")) { in test_mmap()
183 munmap(tmp1, map_sz); in test_mmap()
206 tmp1 = mmap(tmp0, 3 * page_size, PROT_READ, MAP_SHARED | MAP_FIXED, in test_mmap()
[all …]
H A Dxdp_synproxy.c69 SYS(out, "ip link add tmp0 type veth peer name tmp1"); in test_synproxy()
70 SYS(out, "ip link set tmp1 netns synproxy"); in test_synproxy()
87 SYS(out, "ip link set tmp1 up"); in test_synproxy()
88 SYS(out, "ip addr replace 198.18.0.2/24 dev tmp1"); in test_synproxy()
93 -i tmp1 -p tcp -m tcp --syn --dport 8080 -j CT --notrack"); in test_synproxy()
95 -i tmp1 -p tcp -m tcp --dport 8080 -m state --state INVALID,UNTRACKED \ in test_synproxy()
98 -i tmp1 -m state --state INVALID -j DROP"); in test_synproxy()
100 ctrl_file = SYS_OUT("./xdp_synproxy --iface tmp1 --ports 8080 \ in test_synproxy()
110 ctrl_file = SYS_OUT("tc filter show dev tmp1 ingress"); in test_synproxy()
148 ctrl_file = SYS_OUT("./xdp_synproxy --iface tmp1 --single"); in test_synproxy()
/linux/lib/crypto/mips/
H A Dpoly1305-mips.pl76 my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$at,$t0,$t1);
137 subu $tmp1,$zero,$tmp0
140 dsrlv $tmp3,$in1,$tmp1
142 dsrlv $tmp2,$tmp2,$tmp1
145 dsllv $tmp3,$in1,$tmp1
147 dsllv $tmp2,$tmp2,$tmp1
169 and $tmp1,$in0,$tmp0 # byte swap
173 dsll $tmp1,24
178 or $tmp1,$tmp2
188 or $tmp1,$tmp2
[all …]
/linux/arch/loongarch/kernel/
H A Dfpu.S100 .macro sc_save_fcc thread tmp0 tmp1 argument
102 move \tmp1, \tmp0
104 bstrins.w \tmp1, \tmp0, 15, 8
106 bstrins.w \tmp1, \tmp0, 23, 16
108 bstrins.w \tmp1, \tmp0, 31, 24
109 EX st.w \tmp1, \thread, THREAD_FCC
111 move \tmp1, \tmp0
113 bstrins.w \tmp1, \tmp0, 15, 8
115 bstrins.w \tmp1, \tmp0, 23, 16
117 bstrins.w \tmp1, \tmp0, 31, 24
[all …]
/linux/lib/crypto/riscv/
H A Dpoly1305-riscv.pl54 my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$t0,$t1,$t2);
95 neg $tmp1,$tmp0 # implicit &63 in sll
97 sll $tmp3,$in1,$tmp1
99 sll $tmp2,$tmp2,$tmp1
183 srli $tmp1,$h2,2
187 add $tmp1,$tmp1,$tmp0
189 add $d0,$d0,$tmp1 # ... and residue
190 sltu $tmp1,$d0,$tmp1
192 add $tmp0,$tmp0,$tmp1
193 sltu $tmp1,$d1,$h1
[all …]
/linux/arch/x86/lib/
H A Dmemmove_32.S25 .set tmp1, %ebx define
71 movl 1*4(src), tmp1
73 movl tmp1, 1*4(dest)
75 movl 3*4(src), tmp1
77 movl tmp1, 3*4(dest)
88 leal -4(dest, n), tmp1
91 movl tmp0, (tmp1)
98 movl dest, tmp1
104 movl tmp0,(tmp1)
129 movl -2*4(src), tmp1
[all …]
/linux/tools/lib/
H A Drbtree.c230 struct rb_node *node = NULL, *sibling, *tmp1, *tmp2; in ____rb_erase_color() local
252 tmp1 = sibling->rb_left; in ____rb_erase_color()
253 WRITE_ONCE(parent->rb_right, tmp1); in ____rb_erase_color()
255 rb_set_parent_color(tmp1, parent, RB_BLACK); in ____rb_erase_color()
259 sibling = tmp1; in ____rb_erase_color()
261 tmp1 = sibling->rb_right; in ____rb_erase_color()
262 if (!tmp1 || rb_is_black(tmp1)) { in ____rb_erase_color()
319 tmp1 = tmp2->rb_right; in ____rb_erase_color()
320 WRITE_ONCE(sibling->rb_left, tmp1); in ____rb_erase_color()
[all...]
/linux/lib/
H A Drbtree.c230 struct rb_node *node = NULL, *sibling, *tmp1, *tmp2; in ____rb_erase_color() local
252 tmp1 = sibling->rb_left; in ____rb_erase_color()
253 WRITE_ONCE(parent->rb_right, tmp1); in ____rb_erase_color()
255 rb_set_parent_color(tmp1, parent, RB_BLACK); in ____rb_erase_color()
259 sibling = tmp1; in ____rb_erase_color()
261 tmp1 = sibling->rb_right; in ____rb_erase_color()
262 if (!tmp1 || rb_is_black(tmp1)) { in ____rb_erase_color()
319 tmp1 = tmp2->rb_right; in ____rb_erase_color()
320 WRITE_ONCE(sibling->rb_left, tmp1); in ____rb_erase_color()
323 if (tmp1) in ____rb_erase_color()
[all …]
/linux/arch/powerpc/include/asm/book3s/32/
H A Dmmu-hash.h99 .macro update_user_segments_by_4 tmp1 tmp2 tmp3 tmp4
100 uus_addi 1, \tmp2, \tmp1, 0x111
101 uus_addi 2, \tmp3, \tmp1, 0x222
102 uus_addi 3, \tmp4, \tmp1, 0x333
104 uus_mtsr 0, \tmp1
109 uus_addi 4, \tmp1, \tmp1, 0x444
114 uus_mtsr 4, \tmp1
119 uus_addi 8, \tmp1, \tmp1, 0x444
124 uus_mtsr 8, \tmp1
129 uus_addi 12, \tmp1, \tmp1, 0x444
[all …]
/linux/arch/xtensa/lib/
H A Dumulsidi3.S199 .macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
201 1: add \tmp1, \src2, \dst
203 movnez \dst, \tmp1, \tmp2
205 do_addx2 \tmp1, \src2, \dst, \tmp1
207 movnez \dst, \tmp1, \tmp2
209 do_addx4 \tmp1, \src2, \dst, \tmp1
211 movnez \dst, \tmp1, \tmp2
213 do_addx8 \tmp1, \src2, \dst, \tmp1
215 movnez \dst, \tmp1, \tmp2
/linux/arch/arm/include/asm/
H A Dtls.h10 .macro switch_tls_none, base, tp, tpuser, tmp1, tmp2
13 .macro switch_tls_v6k, base, tp, tpuser, tmp1, tmp2
20 .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2
27 ldr_va \tmp1, elf_hwcap
29 tst \tmp1, #HWCAP_TLS @ hardware TLS available?
37 .L1_\@: switch_tls_v6k \base, \tp, \tpuser, \tmp1, \tmp2
41 .macro switch_tls_software, base, tp, tpuser, tmp1, tmp2
42 mov \tmp1, #0xffff0fff
43 str \tp, [\tmp1, #-15] @ set TLS value at 0xffff0ff0
/linux/arch/x86/crypto/
H A Daes-gcm-vaes-avx2.S229 .set TMP1, %ymm1 define
277 _ghash_mul H_INC, H_CUR, H_CUR2, GFPOLY, TMP0, TMP1, TMP2
286 vpunpckhqdq H_CUR, H_CUR2, TMP1
287 vpxor TMP1, TMP0, TMP0
291 _ghash_mul H_INC, H_CUR2, H_CUR, GFPOLY, TMP0, TMP1, TMP2
292 _ghash_mul H_INC, H_CUR, H_CUR2, GFPOLY, TMP0, TMP1, TMP2
299 vpunpckhqdq H_CUR, H_CUR2, TMP1
300 vpxor TMP1, TMP0, TMP0
321 vmovdqu 0*32(\ghashdata_ptr), TMP1
322 vpshufb BSWAP_MASK, TMP1, TMP1
[all …]
/linux/arch/alpha/lib/
H A Ddivide.S58 #define tmp1 $3 macro
110 stq tmp1,24($30)
142 subq modulus,divisor,tmp1
145 cmovne compare,tmp1,modulus
151 ldq tmp1,24($30)
184 stq tmp1,24($30)
191 subq $31,$27,tmp1
194 cmovlt $28,tmp1,$27
195 ldq tmp1,24($30)
H A Dev6-divide.S68 #define tmp1 $3 macro
122 stq tmp1,24($30) # L :
173 subq modulus,divisor,tmp1 # E :
182 cmovne compare,tmp1,modulus # E : Latency 2, extra map slot
187 cmovne compare,tmp1,modulus # E : Latency 2, extra map slot
198 ldq tmp1,24($30) # L :
243 stq tmp1,24($30) # L :
251 subq $31,$27,tmp1 # E : U U L L
255 cmovlt $28,tmp1,$27 # E : Latency 2, extra map slot
258 ldq tmp1,24($30) # L :

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