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/freebsd/lib/libsys/
H A Dtimerfd.21 .\" SPDX-License-Identifier: BSD-2-Clause
67 per-process timer functions, but use a
86 .Bl -tag -width "Fn timerfd_settime"
95 .Bl -ta
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H A Dtimer_settime.235 .Nd "per-process timers (REALTIME)"
52 system call stores the amount of time until the specified timer,
54 expires and the reload value of the timer into the space pointed to by the
60 before the timer expires, or zero if the timer is disarmed.
62 returned as the interval until timer expiration, even if the timer was armed
74 system call sets the time until the next expiration of the timer specified
81 argument and arms the timer if the
85 is non-zero.
86 If the specified timer was already
95 is zero, the timer is disarmed.
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H A Dkqueue.299 argument, which is a bitwise-inclusive OR of the following flags:
100 .Bl -tag -width "KQUEUE_CLOEXEC"
121 .Bl -tag -width O_CLOEXEC
166 is a non-NULL pointer, it specifies a maximum interval to wait
175 argument should be non-NULL, pointing to a zero-valued
191 .Bd -literal
206 .Bl -tag -width "Fa filter"
213 The pre-defined
218 Filter-specific flags.
220 Filter-specific data value.
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dxlnx,xps-timer.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx LogiCORE IP AXI Timer
10 - Sean Anderson <sean.anderson@seco.com>
15 const: xlnx,xps-timer-1.00.a
20 clock-names:
29 '#pwm-cells': true
31 xlnx,count-width:
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H A Dcdns,ttc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/cdns,ttc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence TTC - Triple Timer Counter
10 - Michal Simek <michal.simek@amd.com>
22 A list of 3 interrupts; one per timer channel.
27 power-domains:
30 timer-width:
33 Bit width of the timer, necessary if not 16.
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H A Dnxp,tpm-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Low Power Timer/Pulse Width Modulation Module (TPM)
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The Timer/PWM Module (TPM) supports input capture, output compare,
18 the counter bus for the others, provided bit width is the same.
23 - const: fsl,imx7ulp-tpm
24 - items:
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/freebsd/share/man/man9/
H A Deventtimers.92 .\" Copyright (c) 2011-2013 Alexander Motin <mav@FreeBSD.org>
33 .Bd -literal
87 or periodically, to run different time-based events.
89 .Bl -tag -width "Consumers"
103 provide APIs for event timer drivers and consumers.
110 .Bl -tag -width Va
112 Unique name of the event timer for management purposes.
114 Set of flags, describing timer capabilities:
115 .Bl -tag -width "ET_FLAGS_PERIODIC" -compact
119 One-shot mode supported.
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/freebsd/sys/contrib/device-tree/src/riscv/canaan/
H A Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
21 * Since this is a non-ratified draft specification, the kernel does not
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/freebsd/sys/contrib/device-tree/src/riscv/thead/
H A Dth1520.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
18 timebase-frequency = <3000000>;
24 riscv,isa-base = "rv64i";
25 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
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/freebsd/share/man/man4/
H A Deventtimers.432 Kernel uses several types of time-related devices, such as: real time clocks,
39 periodically, to run different time-based events.
42 Kernel uses time-based events for many different purposes: scheduling,
47 .Bl -tag -width ".Fn hardclock"
63 Different platforms provide different kinds of timer hardware.
65 that hardware, and to use it, supplying kernel with all required time-based
72 .Bd -literal
89 .Bl -inset
92 bitmask, defining event timer capabilities:
93 .Bl -tag -offset indent -width indent -compact
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/freebsd/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j784s4-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sci";
12 ti,host-id = <12>;
14 mbox-names = "rx", "tx";
19 reg-names = "debug_messages";
22 k3_pds: power-controller {
23 bootph-all;
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H A Dk3-j721s2-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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H A Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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H A Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsnps,dwcmshc-sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com>
16 - items:
17 - const: rockchip,rk3576-dwcmshc
18 - const: rockchip,rk3588-dwcmshc
19 - enum:
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-sam9_l9260.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-sam9_l9260.dts - Device Tree file for Olimex SAM9-L9260 board
7 /dts-v1/;
11 model = "Olimex sam9-l9260";
12 compatible = "olimex,sam9-l9260", "atmel,at91sam9260", "atmel,at91sam9";
15 stdout-path = "serial0:115200n8";
24 clock-frequency = <32768>;
28 clock-frequency = <18432000>;
34 tcb0: timer@fffa0000 {
35 timer@0 {
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H A Dat91sam9260ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 stdout-path = &dbgu;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
36 tcb0: timer@fffa0000 {
37 timer@0 {
38 compatible = "atmel,tcb-timer";
42 timer@2 {
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H A Dat91-qil_a9260.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91-qil_a9260.dts - Device Tree file for Calao QIL A9260 board
5 * Copyright (C) 2011-2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
11 compatible = "calao,qil-a9260", "atmel,at91sam9260", "atmel,at91sam9";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
33 tcb0: timer@fffa0000 {
34 timer@0 {
35 compatible = "atmel,tcb-timer";
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H A Dsama5d3xcm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
37 tcb0: timer@f0010000 {
38 timer@0 {
39 compatible = "atmel,tcb-timer";
43 timer@1 {
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H A Dpm9g45.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
40 pinctrl_nand_rb: nand-rb-0 {
47 pinctrl_board_mmc: mmc0-board {
54 tcb0: timer@fff7c000 {
55 timer@0 {
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H A Dat91sam9m10g45ek.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
8 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
13 model = "Atmel AT91SAM9M10G45-E
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/freebsd/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v2.dtsi4 * Antoine Tenart <antoine.tenart@free-electrons.com>
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
35 /dts-v1/;
37 #include <dt-bindings/interrupt-controller/arm-gic.h>
41 compatible = "al,alpine-v2";
42 interrupt-parent = <&gic>;
43 #address-cells = <2>;
44 #size-cells = <2>;
47 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm64/al/
H A Dalpine-v2.dtsi4 * Antoine Tenart <antoine.tenart@free-electrons.com>
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
35 /dts-v1/;
37 #include <dt-bindings/interrupt-controller/arm-gic.h>
41 compatible = "al,alpine-v2";
42 #address-cells = <2>;
43 #size-cells = <2>;
46 #address-cells = <2>;
47 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
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