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/linux/Documentation/devicetree/bindings/timer/
H A Driscv,timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/riscv,timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V timer
10 - Anup Patel <anup@brainfault.org>
13 RISC-V platforms always have a RISC-V timer device for the supervisor-mode
14 based on the time CSR defined by the RISC-V privileged specification. The
15 timer interrupts of this device are configured using the RISC-V SBI Time
16 extension or the RISC-V Sstc extension.
[all …]
/linux/kernel/time/
H A Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
7 * 1997-01-28 Modified by Finn Arne Gangstad to make timers scale better.
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
11 * 1998-12-24 Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
14 * 1999-03-10 Improved NTP compatibility by Ulrich Windl
15 * 2002-05-31 Move sys_sysinfo here and make its locking sane, Robert Love
16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
33 #include <linux/posix-timers.h>
34 #include <linux/cpu.h>
54 #include "tick-internal.h"
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H A Dtick-broadcast.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains functions which emulate a local clock-event
6 * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de>
7 * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar
8 * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner
10 #include <linux/cpu.h>
20 #include "tick-internal.h"
24 * timer stops in C3 state.
39 static void tick_broadcast_clear_oneshot(int cpu);
42 static void tick_broadcast_oneshot_offline(unsigned int cpu);
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H A Dtimer_migration.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include "tick-internal.h"
21 * The timer migration mechanism is built on a hierarchy of groups. The
22 * lowest level group contains CPUs, the next level groups of CPU groups
23 * and so forth. The CPU groups are kept per node so for the normal case
25 * CPUs per node even the next level might be kept as groups of CPU groups
34 * GRP0:0 - GRP0:2 GRP0:3 - GRP0:5
37 * CPUS 0-7 8-15 16-23 24-31 32-39 40-47
39 * The groups hold a timer queue of events sorted by expiry time. These
43 * Each group has a designated migrator CPU/group as long as a CPU/group is
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/linux/drivers/firmware/psci/
H A Dpsci_checker.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/cpu.h>
31 static int tos_resident_cpu = -1;
42 * "enable-method" property of each CPU in the DT, but given that there is no
43 * arch-specific way to check this, we assume that the DT is sensible.
47 int migrate_type = -1; in psci_ops_check()
48 int cpu; in psci_ops_check() local
52 return -EOPNOTSUPP; in psci_ops_check()
61 for_each_online_cpu(cpu) in psci_ops_check()
62 if (psci_tos_resident_on(cpu)) { in psci_ops_check()
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/linux/drivers/clocksource/
H A Dtimer-riscv.c1 // SPDX-License-Identifier: GPL-2.0
6 * All RISC-V systems have a timer attached to every hart. These timers can
11 #define pr_fmt(fmt) "riscv-timer: " fmt
16 #include <linux/cpu.h>
22 #include <linux/io-64-nonatomic-lo-hi.h>
26 #include <clocksource/timer-riscv.h>
107 static int riscv_timer_starting_cpu(unsigned int cpu) in riscv_timer_starting_cpu() argument
109 struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu); in riscv_timer_starting_cpu()
111 /* Clear timer interrupt */ in riscv_timer_starting_cpu()
114 ce->cpumask = cpumask_of(cpu); in riscv_timer_starting_cpu()
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/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
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/linux/kernel/futex/
H A Dwaitwake.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 * In futex wake up scenarios where no tasks are blocked on a futex, taking
34 * CPU 0 CPU 1
40 * sys_futex(WAKE, futex);
50 * This would cause the waiter on CPU 0 to wait forever because it
58 * CPU 0 CPU 1
64 * smp_mb(); (A) <-- paired with -.
70 * | sys_futex(WAKE, futex);
73 * `--------> smp_mb(); (B)
80 * waiters--; (b) unlock(hash_bucket(futex));
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/linux/lib/
H A DKconfig.kfence1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "KFENCE: low-overhead sampling-based memory safety error detector"
12 KFENCE is a low-overhead sampling-based detector of heap out-of-bounds
13 access, use-after-free, and invalid-free errors. KFENCE is designed
17 See <file:Documentation/dev-tools/kfence.rst> for more details.
23 environments. If your kernel targets production use, and cannot
37 setting "kfence.sample_interval" to a non-zero value enables KFENCE.
49 bool "Use a deferrable timer to trigger allocations"
51 Use a deferrable timer to trigger allocations. This avoids forcing
52 CPU wake-ups if the system is idle, at the risk of a less predictable
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/linux/arch/arm64/kvm/
H A Darm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
9 #include <linux/entry-kvm.h>
86 int r = -EINVAL; in kvm_vm_ioctl_enable_cap()
88 if (cap->flags) in kvm_vm_ioctl_enable_cap()
89 return -EINVAL; in kvm_vm_ioctl_enable_cap()
91 if (kvm_vm_is_protected(kvm) && !kvm_pvm_ext_allowed(cap->cap)) in kvm_vm_ioctl_enable_cap()
92 return -EINVAL; in kvm_vm_ioctl_enable_cap()
94 switch (cap->cap) { in kvm_vm_ioctl_enable_cap()
98 &kvm->arch.flags); in kvm_vm_ioctl_enable_cap()
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/linux/kernel/sched/
H A Ddeadline.c1 // SPDX-License-Identifier: GPL-2.0
24 * guard against timer DoS.
58 return dl_se->dl_server; in dl_server()
74 struct rq *rq = dl_se->rq; in rq_of_dl_se()
84 return &rq_of_dl_se(dl_se)->dl; in dl_rq_of_se()
89 return !RB_EMPTY_NODE(&dl_se->rb_node); in on_dl_rq()
95 return dl_se->pi_se; in pi_of()
119 return &cpu_rq(i)->rd->dl_bw; in dl_bw_of()
124 struct root_domain *rd = cpu_rq(i)->rd; in dl_bw_cpus()
130 if (cpumask_subset(rd->span, cpu_active_mask)) in dl_bw_cpus()
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H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Core kernel CPU scheduler code
7 * Copyright (C) 1991-2002 Linus Torvalds
8 * Copyright (C) 1998-2024 Ingo Molnar, Red Hat
72 # include <linux/entry-common.h>
96 #include "../../io_uring/io-wq.h"
160 if (p->sched_class == &stop_sched_class) /* trumps deadline */ in __task_prio()
161 return -2; in __task_prio()
163 if (p->dl_server) in __task_prio()
164 return -1; /* deadline */ in __task_prio()
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/linux/Documentation/dev-tools/
H A Dkfence.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
44 The sample interval controls a timer that sets up KFENCE allocations. By
45 default, to keep the real sample interval predictable, the normal timer also
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/linux/arch/arm/mach-omap1/
H A Dpm.c2 * linux/arch/arm/mach-omap1/pm.c
47 #include <linux/cpu.h>
55 #include <linux/soc/ti/omap1-io.h>
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 return -EINVAL; in idle_store()
129 * tests above as soon as drivers, timer and DMA code have been fixed. in omap1_pm_idle()
163 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade, in omap_pm_wakeup_setup()
166 * wake up to a GPIO interrupt. in omap_pm_wakeup_setup()
263 /* (Step 3 removed - we now allow deep sleep by default) */ in omap1_pm_suspend()
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/linux/kernel/
H A Dsoftirq.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Rewritten. Old one was good in 2.2, but in 2.3 it was immoral. --ANK (990903)
20 #include <linux/cpu.h>
38 - No shared variables, all the data are CPU local.
39 - If a softirq needs serialization, let it serialize itself
41 - Even if softirq is serialized, only local cpu is marked for
42 execution. Hence, we get something sort of weak cpu binding.
47 - NET RX softirq. It is multithreaded and does not require
49 - NET TX softirq. It kicks software netdevice queues, hence
52 - Tasklets: serialized wrt itself.
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H A Dworkqueue.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * kernel/workqueue.c - generic async execution with shared worker pool
10 * Kai Petzke <wpp@marie.physik.tu-berlin.de>
20 * automatically managed. There are two worker pools for each CPU (one for
22 * pools for workqueues which are not bound to any specific CPU - the
25 * Please read Documentation/core-api/workqueue.rst for details.
37 #include <linux/cpu.h>
65 * A bound pool is either associated or disassociated with its CPU.
67 * CPU and none has %WORKER_UNBOUND set and concurrency management
70 * While DISASSOCIATED, the cpu may be offline and all workers have
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/linux/arch/powerpc/include/asm/
H A Dsmu.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * These commands are used to retrieve the sdb-partition-XX datas from
31 * - 0..1 : partition address
32 * - 2 : a byte containing the partition ID
33 * - 3 : length (maybe other bits are rest of header ?)
53 * ---------------------
66 * ------------------------
88 * timer, but also a PRAM
115 * 0: bus number (from device-tree usually, SMU has lots of busses !)
128 * - 0x00: Simple transfer
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/linux/include/net/
H A Dsock.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 * Corey Minyard <wf-rch!minyard@relay.EU.net>
14 * Florian La Roche <flla@stud.uni-sb.de>
42 #include <linux/timer.h>
57 #include <linux/cgroup-defs.h>
79 /* This is the per-socket lock. The spinlock provides a synchronization
81 * mini-semaphore synchronizes multiple users amongst themselves.
88 * We express the mutex-alike socket_lock semantics
106 * struct sock_common - minimal network layer representation of sockets
109 * @skc_addrpair: 8-byte-aligned __u64 union of @skc_daddr & @skc_rcv_saddr
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/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-trans.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2023, 2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
15 #include "iwl-debug.h"
16 #include "iwl-config.h"
18 #include "iwl-op-mode.h"
22 #include "fw/api/dbg-tlv.h"
23 #include "iwl-dbg-tlv.h"
26 * DOC: Transport layer - what is it ?
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/linux/drivers/net/ethernet/micrel/
H A Dksz884x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/net/ethernet/micrel/ksx884x.c - Micrel KSZ8841/2 PCI Ethernet driver
5 * Copyright (c) 2009-2010 Micrel, Inc.
271 #define PHY_CTRL_INTERVAL (KS884X_P2MBCR_P - KS884X_P1MBCR_P)
293 #define PHY_SPECIAL_INTERVAL (KS884X_P2VCT_P - KS884X_P1VCT_P)
482 (KS8842_PORT_2_CTRL_1 - KS8842_PORT_1_CTRL_1))
587 #define STATIC_MAC_TABLE_ADDR 00-0000FFFF-FFFFFFFF
588 #define STATIC_MAC_TABLE_FWD_PORTS 00-00070000-00000000
589 #define STATIC_MAC_TABLE_VALID 00-00080000-00000000
590 #define STATIC_MAC_TABLE_OVERRIDE 00-00100000-00000000
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/linux/Documentation/admin-guide/laptops/
H A Dthinkpad-acpi.rst9 - Borislav Deianov <borislav@users.sf.net>
10 - Henrique de Moraes Holschuh <hmh@hmh.eng.br>
12 http://ibm-acpi.sf.net/
19 This driver used to be named ibm-acpi until kernel 2.6.21 and release
20 0.13-20070314. It used to be in the drivers/acpi tree, but it was
21 moved to the drivers/misc tree and renamed to thinkpad-acpi for kernel
25 The driver is named "thinkpad-acpi". In some places, like module
29 "tpacpi" is used as a shorthand where "thinkpad-acpi" would be too
33 ------
38 - Fn key combinations
[all …]
/linux/drivers/comedi/drivers/
H A Damplc_pci230.c1 // SPDX-License-Identifier: GPL-2.0+
8 * COMEDI - Linux Control and Measurement Device Interface
35 * --------- ---------
43 * The AI subdevice has 16 single-ended channels or 8 differential
46 * The PCI230 and PCI260 cards have 12-bit resolution. The PCI230+ and
47 * PCI260+ cards have 16-bit resolution.
51 * or PCI260 then it actually uses a "pseudo-differential" mode where the
62 * 0 => [-10, +10] V
63 * 1 => [-5, +5] V
64 * 2 => [-2.5, +2.5] V
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/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
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/linux/Documentation/power/
H A Druntime_pm.rst5 (C) 2009-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
18 put their PM-related work items. It is strongly recommended that pm_wq be
20 them to be synchronized with system-wide power transitions (suspend to RAM,
53 The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks
57 1. PM domain of the device, if the device's PM domain object, dev->pm_domain,
60 2. Device type of the device, if both dev->type and dev->type->pm are present.
62 3. Device class of the device, if both dev->class and dev->class->pm are
65 4. Bus type of the device, if both dev->bus and dev->bus->pm are present.
69 dev->driver->pm directly (if present).
73 and bus type. Moreover, the high-priority one will always take precedence over
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/linux/Documentation/driver-api/nfc/
H A Dnfc-hci.rst5 - Author: Eric Lapuyade, Samuel Ortiz
6 - Contact: eric.lapuyade@intel.com, samuel.ortiz@intel.com
9 -------
12 enables easy writing of HCI-based NFC drivers. The HCI layer runs as an NFC Core
17 ---
30 - one for executing commands : nfc_hci_msg_tx_work(). Only one command
32 - one for dispatching received events and commands : nfc_hci_msg_rx_work().
35 --------------------------
41 In case the chip supports pre-opened gates and pseudo-static pipes, the driver
45 -------------------
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