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/linux/Documentation/devicetree/bindings/timer/
H A Driscv,timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/riscv,timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V timer
10 - Anup Patel <anup@brainfault.org>
13 RISC-V platforms always have a RISC-V timer device for the supervisor-mode
14 based on the time CSR defined by the RISC-V privileged specification. The
15 timer interrupts of this device are configured using the RISC-V SBI Time
16 extension or the RISC-V Sstc extension.
[all …]
/linux/kernel/time/
H A Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
7 * 1997-01-28 Modified by Finn Arne Gangstad to make timers scale better.
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
11 * 1998-12-24 Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
14 * 1999-03-10 Improved NTP compatibility by Ulrich Windl
15 * 2002-05-31 Move sys_sysinfo here and make its locking sane, Robert Love
16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
33 #include <linux/posix-timers.h>
34 #include <linux/cpu.h>
54 #include "tick-internal.h"
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H A Dtick-broadcast.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains functions which emulate a local clock-event
6 * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de>
7 * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar
8 * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner
10 #include <linux/cpu.h>
20 #include "tick-internal.h"
24 * timer stops in C3 state.
39 static void tick_broadcast_clear_oneshot(int cpu);
42 static void tick_broadcast_oneshot_offline(unsigned int cpu);
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H A Dtimer_migration.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include "tick-internal.h"
21 * The timer migration mechanism is built on a hierarchy of groups. The
22 * lowest level group contains CPUs, the next level groups of CPU groups
23 * and so forth. The CPU groups are kept per node so for the normal case
25 * CPUs per node even the next level might be kept as groups of CPU groups
34 * GRP0:0 - GRP0:2 GRP0:3 - GRP0:5
37 * CPUS 0-7 8-15 16-23 24-31 32-39 40-47
39 * The groups hold a timer queue of events sorted by expiry time. These
43 * Each group has a designated migrator CPU/group as long as a CPU/group is
[all …]
/linux/drivers/firmware/psci/
H A Dpsci_checker.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/cpu.h>
31 static int tos_resident_cpu = -1;
42 * "enable-method" property of each CPU in the DT, but given that there is no
43 * arch-specific way to check this, we assume that the DT is sensible.
47 int migrate_type = -1; in psci_ops_check()
48 int cpu; in psci_ops_check() local
52 return -EOPNOTSUPP; in psci_ops_check()
61 for_each_online_cpu(cpu) in psci_ops_check()
62 if (psci_tos_resident_on(cpu)) { in psci_ops_check()
[all …]
/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
[all …]
/linux/drivers/clocksource/
H A Dtimer-riscv.c1 // SPDX-License-Identifier: GPL-2.0
6 * All RISC-V systems have a timer attached to every hart. These timers can
11 #define pr_fmt(fmt) "riscv-timer: " fmt
16 #include <linux/cpu.h>
22 #include <linux/io-64-nonatomic-lo-hi.h>
26 #include <clocksource/timer-riscv.h>
107 static int riscv_timer_starting_cpu(unsigned int cpu) in riscv_timer_starting_cpu() argument
109 struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu); in riscv_timer_starting_cpu()
111 /* Clear timer interrupt */ in riscv_timer_starting_cpu()
114 ce->cpumask = cpumask_of(cpu); in riscv_timer_starting_cpu()
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/linux/kernel/futex/
H A Dwaitwake.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 * In futex wake up scenarios where no tasks are blocked on a futex, taking
34 * CPU 0 CPU 1
40 * sys_futex(WAKE, futex);
50 * This would cause the waiter on CPU
[all...]
/linux/lib/
H A DKconfig.kfence1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "KFENCE: low-overhead sampling-based memory safety error detector"
12 KFENCE is a low-overhead sampling-based detector of heap out-of-bounds
13 access, use-after-free, and invalid-free errors. KFENCE is designed
17 See <file:Documentation/dev-tools/kfence.rst> for more details.
23 environments. If your kernel targets production use, and cannot
37 setting "kfence.sample_interval" to a non-zero value enables KFENCE.
49 bool "Use a deferrable timer to trigger allocations"
51 Use a deferrable timer to trigger allocations. This avoids forcing
52 CPU wake-ups if the system is idle, at the risk of a less predictable
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/linux/arch/arm64/kvm/
H A Darm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
85 int r = -EINVAL; in kvm_vm_ioctl_enable_cap()
87 if (cap->flags) in kvm_vm_ioctl_enable_cap()
88 return -EINVAL; in kvm_vm_ioctl_enable_cap()
90 if (kvm_vm_is_protected(kvm) && !kvm_pvm_ext_allowed(cap->cap)) in kvm_vm_ioctl_enable_cap()
91 return -EINVAL; in kvm_vm_ioctl_enable_cap()
93 switch (cap->cap) { in kvm_vm_ioctl_enable_cap()
97 &kvm->arch.flags); in kvm_vm_ioctl_enable_cap()
100 mutex_lock(&kvm->lock); in kvm_vm_ioctl_enable_cap()
[all …]
/linux/kernel/rcu/
H A Dtree_nocb.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Read-Copy Update mechanism for mutual exclusion (tree-based version)
4 * Internal non-public definitions that provide either classic
23 if (!rdp->nocb_cb_kthread || !rdp->nocb_gp_kthread) in rcu_current_is_nocb_kthread()
26 if (current == rdp->nocb_cb_kthread || current == rdp->nocb_gp_kthread) in rcu_current_is_nocb_kthread()
33 * Offload callback processing from the boot-time-specified set of CPUs
35 * created that pull the callbacks from the corresponding CPU, wait for
39 * invoke callbacks. Each GP kthread invokes its own CBs. The no-CBs CPUs
42 * in which case each kthread actively polls its CPU. (Which isn't so great
43 * for energy efficiency, but which does reduce RCU's overhead on that CPU.)
[all …]
/linux/kernel/sched/
H A Ddeadline.c1 // SPDX-License-Identifier: GPL-2.0
28 * guard against timer DoS.
62 return dl_se->dl_server; in dl_server()
78 struct rq *rq = dl_se->rq; in rq_of_dl_se()
88 return &rq_of_dl_se(dl_se)->dl; in dl_rq_of_se()
93 return !RB_EMPTY_NODE(&dl_se->rb_node); in on_dl_rq()
99 return dl_se->pi_se; in pi_of()
122 return &cpu_rq(i)->rd->dl_bw; in dl_bw_of()
127 struct root_domain *rd = cpu_rq(i)->rd; in dl_bw_cpus()
133 if (cpumask_subset(rd->span, cpu_active_mask)) in dl_bw_cpus()
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H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Core kernel CPU scheduler code
7 * Copyright (C) 1991-2002 Linus Torvalds
8 * Copyright (C) 1998-2024 Ingo Molnar, Red Hat
75 # include <linux/irq-entry-common.h>
99 #include "../../io_uring/io-wq.h"
148 pr_warn("CONFIG_SCHED_PROXY_EXEC=n, so it cannot be enabled or disabled at boot time\n"); in setup_proxy_exec()
193 if (p->sched_class == &stop_sched_class) /* trumps deadline */ in __task_prio()
194 return -2; in __task_prio()
196 if (p->dl_server) in __task_prio()
[all …]
H A Drt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Real-Time Scheduling Class (mapped to the SCHED_FIFO and SCHED_RR
15 * period over which we measure -rt task CPU usage in us.
73 array = &rt_rq->active; in init_rt_rq()
75 INIT_LIST_HEAD(array->queue + i); in init_rt_rq()
76 __clear_bit(i, array->bitmap); in init_rt_rq()
79 __set_bit(MAX_RT_PRIO, array->bitmap); in init_rt_rq()
81 rt_rq->highest_prio.curr = MAX_RT_PRIO-1; in init_rt_rq()
82 rt_rq->highest_prio.next = MAX_RT_PRIO-1; in init_rt_rq()
83 rt_rq->overloaded = 0; in init_rt_rq()
[all …]
/linux/drivers/usb/musb/
H A Dtusb6010.c1 // SPDX-License-Identifier: GPL-2.0
9 * - Driver assumes that interface to external host (main CPU) is
27 #include <linux/dma-mapping.h>
51 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
68 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision()
71 rev = musb->tusb_revision; in tusb_print_revision()
96 * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
101 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk()
114 dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n", in tusb_wbus_quirk()
123 dev_dbg(musb->controller, "Disabled tusb wbus quirk ctrl %08x ena %08x\n", in tusb_wbus_quirk()
[all …]
/linux/Documentation/dev-tools/
H A Dkfence.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Kernel Electric-Fence (KFENCE)
7 Kernel Electric-Fence (KFENCE) is a low-overhead sampling-based memory safety
8 error detector. KFENCE detects heap out-of-bounds access, use-after-free, and
9 invalid-free errors.
15 non-production test workloads. One way to quickly achieve a large enough total
19 -----
26 ``kfence.sample_interval`` to non-zero value), configure the kernel with::
44 The sample interval controls a timer that sets up KFENCE allocations. By
45 default, to keep the real sample interval predictable, the normal timer also
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/linux/drivers/power/reset/
H A Dat91-sama5d2_shdwc.c2 * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
8 * Evolved from driver at91-poweroff.c.
15 * - addition to status of other wake-up inputs [1 - 15]
16 * - Analog Comparator wake-up alarm
17 * - Serial RX wake-up alarm
18 * - low power debouncer
50 #define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
58 #define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
59 #define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
60 #define SHDW_RTTWK(reg, cfg) (((reg) >> ((cfg)->sr_rttwk_shift)) & 0x1)
[all …]
/linux/drivers/tty/
H A Dmips_ejtag_fdc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2007-2015 Imagination Technologies Ltd
25 #include <linux/timer.h>
87 * struct mips_ejtag_fdc_tty_port - Wrapper struct for FDC tty_port.
117 * struct mips_ejtag_fdc_tty - Driver data for FDC as a whole.
120 * @cpu: CPU number for this FDC.
123 * @ports: Per-channel data.
137 * @poll_timer: Timer for polling for interrupt events when @irq < 0.
144 unsigned int cpu; member
174 __raw_writel(data, priv->reg + offs); in mips_ejtag_fdc_write()
[all …]
/linux/arch/arm/mach-omap1/
H A Dpm.c2 * linux/arch/arm/mach-omap1/pm.c
47 #include <linux/cpu.h>
55 #include <linux/soc/ti/omap1-io.h>
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 return -EINVAL; in idle_store()
129 * tests above as soon as drivers, timer and DMA code have been fixed. in omap1_pm_idle()
163 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade, in omap_pm_wakeup_setup()
166 * wake up to a GPIO interrupt. in omap_pm_wakeup_setup()
263 /* (Step 3 removed - we now allow deep sleep by default) */ in omap1_pm_suspend()
[all …]
/linux/arch/powerpc/include/asm/
H A Dsmu.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * These commands are used to retrieve the sdb-partition-XX datas from
31 * - 0..1 : partition address
32 * - 2 : a byte containing the partition ID
33 * - 3 : length (maybe other bits are rest of header ?)
53 * ---------------------
66 * ------------------------
88 * timer, but also a PRAM
115 * 0: bus number (from device-tree usually, SMU has lots of busses !)
128 * - 0x00: Simple transfer
[all …]
/linux/kernel/
H A Dsoftirq.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Rewritten. Old one was good in 2.2, but in 2.3 it was immoral. --ANK (990903)
20 #include <linux/cpu.h>
38 - No shared variables, all the data are CPU local.
39 - If a softirq needs serialization, let it serialize itself
41 - Even if softirq is serialized, only local cpu is marked for
42 execution. Hence, we get something sort of weak cpu binding.
47 - NET RX softirq. It is multithreaded and does not require
49 - NET TX softirq. It kicks software netdevice queues, hence
52 - Tasklets: serialized wrt itself.
[all …]
H A Dworkqueue.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * kernel/workqueue.c - generic async execution with shared worker pool
10 * Kai Petzke <wpp@marie.physik.tu-berlin.de>
20 * automatically managed. There are two worker pools for each CPU (one for
22 * pools for workqueues which are not bound to any specific CPU - the
25 * Please read Documentation/core-api/workqueue.rst for details.
37 #include <linux/cpu.h>
65 * A bound pool is either associated or disassociated with its CPU.
67 * CPU and none has %WORKER_UNBOUND set and concurrency management
70 * While DISASSOCIATED, the cpu may be offline and all workers have
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/linux/arch/x86/kvm/svm/
H A Davic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
19 #include <linux/amd-iommu.h>
65 static_assert(__AVIC_GATAG(AVIC_VM_ID_MASK, AVIC_VCPU_IDX_MASK) == -1u);
67 #define AVIC_AUTO_MODE -1
72 *(int *)kp->arg = AVIC_AUTO_MODE; in avic_param_set()
133 * Note! Always intercept LVTT, as TSC-deadline timer mode in avic_set_x2apic_msr_interception()
134 * isn't virtualized by hardware, and the CPU will generate a in avic_set_x2apic_msr_interception()
148 if (intercept == svm->x2avic_msrs_intercepted) in avic_set_x2apic_msr_interception()
155 svm_set_intercept_for_msr(&svm->vcpu, x2avic_passthrough_msrs[i], in avic_set_x2apic_msr_interception()
[all …]
/linux/drivers/tty/serial/
H A Dimx.c1 // SPDX-License-Identifier: GPL-2.0+
31 #include <linux/dma-mapping.h>
34 #include <linux/dma/imx-dma.h>
49 #define UTIM 0xa0 /* Escape Timer Register */
79 #define UCR1_ATDMAEN (1<<2) /* Aging DMA Timer Enable */
92 #define UCR2_ATEN (1<<3) /* Aging Timer Enable */
104 #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */
105 #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */
114 #define UCR4_WKEN (1<<7) /* Wake interrupt enable */
126 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
[all …]
/linux/include/linux/
H A Dinterrupt.h1 /* SPDX-License-Identifier: GPL-2.0 */
44 * IRQF_SHARED - allow sharing the irq among several devices
45 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
46 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt
47 * IRQF_PERCPU - Interrupt is per cpu
48 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing
49 * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is
52 * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished.
55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee
56 * that this interrupt will wake the system from a suspended
[all …]

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