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/linux/tools/perf/pmu-events/arch/x86/grandridge/
H A Dgrr-metrics.json4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
18 "MetricExpr": "cstate_module@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
31 …"BriefDescription": "Cycles per instruction retired; indicating how much time each executed instru…
43 "BriefDescription": "Percentage of time spent in the active CPU power state C0",
169 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
189 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend due to…
197 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend …
203 …"PublicDescription": "Counts the total number of issue slots that were not consumed by the backend…
[all …]
/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A Dpipeline.json28 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
54 …time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For th…
72 …nge from time to time due to power or thermal throttling. For this reason, this event may have a c…
88 …but has the same incrementing frequency as the time stamp counter. This event can approximate elap…
98 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
108 …but has the same incrementing frequency as the time stamp counter. This event can approximate elap…
125 …time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For th…
143 …nge from time to time due to power or thermal throttling. For this reason, this event may have a c…
157 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
161 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
[all …]
/linux/tools/perf/pmu-events/arch/x86/alderlaken/
H A Dpipeline.json158 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
259 …e core frequency may change from time to time. For this reason this event may have a changing rati…
268 …e core frequency may change from time to time. For this reason this event may have a changing rati…
275 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
284 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
292 …e core frequency may change from time to time. For this reason this event may have a changing rati…
301 …e core frequency may change from time to time. For this reason this event may have a changing rati…
367 …ounts the number of machine clears due to a page fault. Counts both I-Side and D-Side (Loads/Stor…
401 …Counts the number of issue slots not consumed by the backend due to a micro-sequencer (MS) scorebo…
405 …Counts the number of issue slots not consumed by the backend due to a micro-sequencer (MS) scorebo…
[all …]
H A Dadln-metrics.json4 "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
32 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
46 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
53 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
60 "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",
67 "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dlantiq,pef2256.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
20 - const: lantiq,pef2256
27 - description: Master Clock
28 - description: System Clock Receive
29 - description: System Clock Transmit
31 clock-names:
33 - const: mclk
[all …]
/linux/tools/perf/pmu-events/arch/x86/sierraforest/
H A Dsrf-metrics.json4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
18 "MetricExpr": "cstate_module@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
31 …"BriefDescription": "Cycles per instruction retired; indicating how much time each executed instru…
43 "BriefDescription": "Percentage of time spent in the active CPU power state C0",
241 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
261 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend due to…
269 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend …
275 …"PublicDescription": "Counts the total number of issue slots that were not consumed by the backend…
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/
H A Dpipeline.json21 "PublicDescription": "Duration for which all slots in the Load-Store Unit (LSU) are busy",
24 "BriefDescription": "Duration for which all slots in the Load-Store Unit (LSU) are busy"
27 …for which all slots in the load-store issue queue are busy. This event counts the cycles where all…
30 …for which all slots in the load-store issue queue are busy. This event counts the cycles where all…
33 …ch all slots in the data processing issue queue are busy. This event counts the cycles where all s…
36 …ch all slots in the data processing issue queue are busy. This event counts the cycles where all s…
39 …cDescription": "Duration for which all slots in the data engine issue queue are busy. This event i…
42 …fDescription": "Duration for which all slots in the data engine issue queue are busy. This event i…
/linux/tools/perf/pmu-events/arch/x86/elkhartlake/
H A Dpipeline.json89 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
149 …e core frequency may change from time to time. For this reason this event may have a changing rati…
158 …e core frequency may change from time to time. For this reason this event may have a changing rati…
166 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
174 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
183 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
274 …ounts the number of machine clears due to a page fault. Counts both I-Side and D-Side (Loads/Stor…
290 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend …
294 …slots that were not consumed by the backend because allocation is stalled due to a mispredicted ju…
299 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
[all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Dpipeline.json89 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
149 …e core frequency may change from time to time. For this reason this event may have a changing rati…
158 …e core frequency may change from time to time. For this reason this event may have a changing rati…
166 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
174 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
183 …ncy changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC)…
274 …ounts the number of machine clears due to a page fault. Counts both I-Side and D-Side (Loads/Stor…
290 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend …
294 …slots that were not consumed by the backend because allocation is stalled due to a mispredicted ju…
299 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
[all …]
/linux/tools/testing/selftests/kvm/
H A Ddirty_log_perf_test.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <time.h>
70 struct kvm_vcpu *vcpu = vcpu_args->vcpu; in vcpu_worker()
71 int vcpu_idx = vcpu_args->vcpu_idx; in vcpu_worker()
80 run = vcpu->run; in vcpu_worker()
92 exit_reason_str(run->exit_reason)); in vcpu_worker()
100 pages_count += vcpu_args->pages; in vcpu_worker()
102 pr_debug("vCPU %d iteration %d dirty memory time in vcpu_worker()
131 int slots; global() member
[all...]
/linux/tools/perf/Documentation/
H A Dtopdown.txt2 ---------------------
11 perf stat --topdown implements this using available metrics that vary
14 % perf stat -a --topdown -I1000
15 # time % tma_retiring % tma_backend_bound % tma_frontend_bound % tma_bad_specula…
38 On Ice Lake, there is a new fixed counter 3: SLOTS, which reports
39 "pipeline SLOTS" (cycles multiplied by core issue width) and a
40 metric register that reports slots ratios for the different bottleneck
52 The application opens a group with fixed counter 3 (SLOTS) and any
76 /* Open slots counter file descriptor for current task. */
77 struct perf_event_attr slots = {
[all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A Dpipeline.json19 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
336 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
372 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
414 …"BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns)",
419 …"PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding re…
505 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
532 …Description": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time but more…
536 …tion": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more…
542 …Description": "Core clocks when the thread is in the C0.2 light-weight faster wakeup time but less…
546 …tion": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less…
[all …]
H A Dadl-metrics.json4 "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
32 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
46 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
53 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
60 "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",
67 "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",
[all …]
/linux/fs/btrfs/
H A Dinode-item.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "inode-item.h"
10 #include "disk-io.h"
12 #include "space-info.h"
14 #include "extent-tree.h"
15 #include "file-item.h"
35 if (len != name->len) in btrfs_find_name_in_backref()
37 if (memcmp_extent_buffer(leaf, name->name, name_ptr, in btrfs_find_name_in_backref()
38 name->len) == 0) in btrfs_find_name_in_backref()
60 * looking through any collisions so most of the time this is in btrfs_find_name_in_ext_backref()
[all …]
/linux/Documentation/filesystems/
H A Dvfat.rst10 mount -t vfat /dev/fd0 /mnt
42 **-20**: If current process is in group of file's group ID,
45 **-2**: Other users can change timestamp.
69 There is also an option of doing UTF-8 translations
76 UTF-8 is the filesystem safe version of Unicode that
79 If 'uni_xlate' gets set, UTF-8 gets disabled.
141 Interpret timestamps as UTC rather than local time.
143 between local time (as used by Windows on FAT) and UTC
147 local time.
150 Set offset for conversion of timestamps from local time
[all …]
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A Dpipeline.json18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
228 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
283 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
294 …"BriefDescription": "Mispredicted non-taken conditional branch instructions retired. This precise …
343 …"BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns)",
348 …"PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding re…
429 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
454 …Description": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time but more…
458 …tion": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more…
464 …Description": "Core clocks when the thread is in the C0.2 light-weight faster wakeup time but less…
[all …]
H A Dmtl-metrics.json4 "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
32 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
46 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
53 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
60 "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",
67 "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",
[all …]
/linux/tools/perf/pmu-events/arch/x86/goldmontplus/
H A Dpipeline.json164 …e core frequency may change from time to time. For this reason this event may have a changing rati…
189 …nge from time. This event is not affected by core frequency changes but counts as if the core is …
225 …S records can be collected only on IA32_PMC0, only one event can use the PEBS facility at a time.",
229 "BriefDescription": "Instructions retired - using Reduced Skid PEBS feature",
238 "BriefDescription": "Unfilled issue slots per cycle",
242 …"PublicDescription": "Counts the number of issue slots per core cycle that were not consumed by th…
246 "BriefDescription": "Unfilled issue slots per cycle to recover",
250 …slots per core cycle that were not consumed by the backend because allocation is stalled waiting f…
255 … "BriefDescription": "Unfilled issue slots per cycle because of a full resource in the backend",
259 …ssue slots per core cycle that were not consumed because of a full resource in the backend. Inclu…
[all …]
/linux/tools/perf/pmu-events/arch/x86/goldmont/
H A Dpipeline.json164 …e core frequency may change from time to time. For this reason this event may have a changing rati…
189 …nge from time. This event is not affected by core frequency changes but counts as if the core is …
224 …S records can be collected only on IA32_PMC0, only one event can use the PEBS facility at a time.",
228 "BriefDescription": "Unfilled issue slots per cycle",
232 …"PublicDescription": "Counts the number of issue slots per core cycle that were not consumed by th…
236 "BriefDescription": "Unfilled issue slots per cycle to recover",
240 …slots per core cycle that were not consumed by the backend because allocation is stalled waiting f…
245 … "BriefDescription": "Unfilled issue slots per cycle because of a full resource in the backend",
249 …ssue slots per core cycle that were not consumed because of a full resource in the backend. Inclu…
279 …, but did not occur because the store data was not available at the right time. The forward might…
[all …]
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-scc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
19 - enum:
20 - fsl,mpc885-scc-qmc
21 - fsl,mpc866-scc-qmc
22 - const: fsl,cpm1-scc-qmc
26 - description: SCC (Serial communication controller) register base
[all …]
H A Dfsl,qe-ucc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
19 - enum:
20 - fsl,mpc8321-ucc-qmc
21 - const: fsl,qe-ucc-qmc
25 - description: UCC (Unified communication controller) register base
26 - description: Dual port ram base
[all …]
H A Dfsl,cpm1-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc885-tsa
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
H A Ddcn31_hpo_dp_link_encoder.c32 enc3->base.ctx->logger
35 (enc3->regs->reg)
39 enc3->hpo_le_shift->field_name, enc3->hpo_le_mask->field_name
43 enc3->base.ctx
96 switch (tp_params->dp_phy_pattern) { in dcn31_hpo_dp_link_enc_set_link_test_pattern()
212 …tp_custom = (tp_params->custom_pattern[2] << 16) | (tp_params->custom_pattern[1] << 8) | tp_params… in dcn31_hpo_dp_link_enc_set_link_test_pattern()
214 …tp_custom = (tp_params->custom_pattern[5] << 16) | (tp_params->custom_pattern[4] << 8) | tp_params… in dcn31_hpo_dp_link_enc_set_link_test_pattern()
216 …tp_custom = (tp_params->custom_pattern[8] << 16) | (tp_params->custom_pattern[7] << 8) | tp_params… in dcn31_hpo_dp_link_enc_set_link_test_pattern()
218 …tp_custom = (tp_params->custom_pattern[11] << 16) | (tp_params->custom_pattern[10] << 8) | tp_para… in dcn31_hpo_dp_link_enc_set_link_test_pattern()
220 …tp_custom = (tp_params->custom_pattern[14] << 16) | (tp_params->custom_pattern[13] << 8) | tp_para… in dcn31_hpo_dp_link_enc_set_link_test_pattern()
[all …]
/linux/drivers/firmware/efi/libstub/
H A Drandomalloc.c1 // SPDX-License-Identifier: GPL-2.0
13 * Return the number of slots covered by this entry, i.e., the number of
25 if (md->type != EFI_CONVENTIONAL_MEMORY) in get_entry_num_slots()
28 if (md->attribute & EFI_MEMORY_HOT_PLUGGABLE) in get_entry_num_slots()
32 (md->attribute & EFI_MEMORY_SP)) in get_entry_num_slots()
35 region_end = min(md->phys_addr + md->num_pages * EFI_PAGE_SIZE - 1, in get_entry_num_slots()
40 first_slot = round_up(max(md->phys_addr, alloc_min), align); in get_entry_num_slots()
41 last_slot = round_down(region_end - size + 1, align); in get_entry_num_slots()
46 return ((unsigned long)(last_slot - first_slot) >> align_shift) + 1; in get_entry_num_slots()
55 #define MD_NUM_SLOTS(md) ((md)->virt_addr)
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_bo_doc.h1 /* SPDX-License-Identifier: MIT */
25 * ----------
38 * --------
44 * the backing store can be deferred from creation time until first use which is
53 * the BO dma-resv slots / lock point to the VM's dma-resv slots / lock (all
54 * private BOs to a VM share common dma-resv slots / lock).
62 * own unique dma-resv slots / lock. An external BO will be in an array of all
90 * ----------------
109 * dma-resv slots.
118 * ------------------------------
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