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/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-pisp-be.rst17 The PiSP Back End processes images in tiles, and its configuration requires
30 to be processed and is therefore shared across all the tiles of the image. So
32 across all tiles from the same frame.
40 As the ISP processes images in tiles, each set of tiles parameters describe how
42 parameters consist of 160 bytes of data and to process a batch of tiles several
43 sets of tiles parameters are required.
45 Tiles parameters are passed to the ISP by populating the member of
/linux/Documentation/devicetree/bindings/arm/
H A Darm,integrator.yaml14 They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
15 so the system is modular and can host a variety of CPU tiles called
16 "core tiles" and referred to in the device tree as "core modules".
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_cr_defs_client.h103 * must be configured in terms of the number of tiles in X & Y axis.
123 * as the number of tiles defined in the RGX_CR_TE_SCREEN register.
143 * Macrotile width, in tiles. A value of zero corresponds to the maximum size
150 * Macrotile height, in tiles. A value of zero corresponds to the maximum size
/linux/include/uapi/drm/
H A Ddrm_fourcc.h561 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
578 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
596 * This is a tiled layout using 4Kb tiles in row-major layout.
597 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
617 * considered to be made up of normal 128Bx32 Y tiles, Thus
632 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
643 * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
666 * corresponds to an area of 4x1 tiles i
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H A Damdxdna_accel.h68 * @num_tiles: Number of AIE tiles.
311 * @core: The metadata for all core tiles.
312 * @mem: The metadata for all mem tiles.
313 * @shim: The metadata for all shim tiles.
H A Dvc4_drm.h166 /* By default, the kernel gets to choose the order that the tiles are
167 * rendered in. If this is set, then the tiles will be rendered in a
/linux/drivers/video/fbdev/core/
H A DKconfig197 where the screen is divided into rectangular sections (tiles), whereas
200 parameters in terms of number of tiles instead of number of pixels.
204 terms of number of tiles in the x- and y-axis.
/linux/include/linux/
H A Dfb.h325 __u32 length; /* number of tiles in the map */
333 __u32 width; /* number of tiles in the x-axis */
334 __u32 height; /* number of tiles in the y-axis */
346 __u32 width; /* number of tiles in the x-axis */
347 __u32 height; /* number of tiles in the y-axis */
353 __u32 width; /* number of tiles in the x-axis */
354 __u32 height; /* number of tiles in the y-axis */
357 __u32 length; /* number of tiles to draw */
374 /* all dimensions from hereon are in terms of tiles */
376 /* move a rectangular region of tiles from one area to another*/
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/linux/Documentation/admin-guide/perf/
H A Dthunderx2-pmu.rst9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
11 to the total number of channels/tiles.
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dnv25.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
H A Dnv35.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
H A Dnv36.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
H A Dnv40.c33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
H A Dnv20.c46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
H A Dnv30.c52 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv30_fb_tile_comp() local
53 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv30_fb_tile_comp()
/linux/drivers/media/platform/mediatek/vcodec/decoder/vdec/
H A Dvdec_vp9_req_lat_if.c275 struct vdec_vp9_slice_tiles tiles; member
887 struct vdec_vp9_slice_tiles *tiles; in vdec_vp9_slice_setup_tile() local
897 tiles = &vsi->frame.tiles; in vdec_vp9_slice_setup_tile()
898 tiles->actual_rows = 0; in vdec_vp9_slice_setup_tile()
911 tiles->mi_rows[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
912 if (tiles->mi_rows[i]) in vdec_vp9_slice_setup_tile()
913 tiles->actual_rows++; in vdec_vp9_slice_setup_tile()
920 tiles->mi_cols[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
1058 * parse tiles according to `6.4 Decode tiles syntax`
1061 * frame contains uncompress header, compressed header and several tiles.
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/linux/drivers/gpu/drm/xe/
H A Dxe_device_types.h126 * at the root tile, and the MSTR_TILE_INTR register will report which tiles
164 * still be accessed by all tiles' GTs.
251 /** @info.tile_count: Number of tiles */
440 /** @tiles: device tiles */
441 struct xe_tile tiles[XE_MAX_TILES_PER_DEVICE]; member
H A Dxe_tile_sysfs_types.h17 * When dealing with multiple TILEs, this struct helps to understand which
/linux/drivers/video/fbdev/
H A Dgbefb.c688 The GBE hardware uses a tiled memory to screen mapping. Tiles are in gbefb_set_par()
691 tiles on the right and/or bottom of the screen if needed. in gbefb_set_par()
709 Tiles have the advantage that they can be allocated individually in in gbefb_set_par()
715 Tiles are still allocated as independent chunks of 64KB of in gbefb_set_par()
750 /* Tell gbe about the tiles table location */ in gbefb_set_par()
1158 printk(KERN_ERR "gbefb: couldn't allocate tiles table\n"); in gbefb_probe()
1192 /* map framebuffer memory into tiles table */ in gbefb_probe()
/linux/arch/arm/include/debug/
H A Dvexpress.S28 @ - all other (RS1 complaint) tiles use UART mapped
/linux/Documentation/devicetree/bindings/media/
H A Draspberrypi,pispbe.yaml16 in tiles and produces images consumable by applications.
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_hw_types.h364 /* Specifies the number of tiles in the x direction
371 /* Specifies the number of tiles in the y direction to
409 * THIN tiles use an 8x8x1 tile size.
410 * THICK tiles use an 8x8x4 tile size.
/linux/drivers/media/platform/verisilicon/
H A Dhantro_hevc.c90 /* Need to reallocate due to tiles passed via PPS */ in tile_buffer_reallocate()
260 * Maximum number of tiles times width and height (2 bytes each), in hantro_hevc_dec_init()
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-hid-picolcd41 tiles get changed and it's not appropriate to expect the application
/linux/Documentation/gpu/
H A Ddrm-vm-bind-async.rst209 * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,

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