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Searched +full:tegra234 +full:- +full:cbb +full:- +full:fabric (Results 1 – 2 of 2) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra234-cbb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra CBB 2.0
10 - Sumit Gupta <sumitg@nvidia.com>
13 The Control Backbone (CBB) is comprised of the physical path from an
14 initiator to a target's register configuration space. CBB 2.0 consists
15 of multiple sub-blocks connected to each other to create a topology.
16 The Tegra234 SoC has different fabrics based on CBB 2.0 architecture
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-binding
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