Home
last modified time | relevance | path

Searched +full:tegra210 +full:- +full:ahub (Results 1 – 25 of 27) sorted by relevance

12

/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra210-ahub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 AHUB
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
[all …]
H A Dnvidia,tegra210-admaif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 ADMAIF
10 ADMAIF is the interface between ADMA and AHUB. Each ADMA channel
11 that sends/receives data to/from AHUB must interface through an
12 ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF
13 Tx channel and ADMA channel receiving data from AHUB pairs with
17 - Jon Hunter <jonathanh@nvidia.com>
[all …]
H A Dnvidia,tegra210-ope.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ope.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 OPE
10 The Output Processing Engine (OPE) is one of the AHUB client. It has
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Mohan Kumar <mkumard@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: dai-common.yaml#
[all …]
H A Dnvidia,tegra-audio-graph-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Sameer Pujar <spujar@nvidia.com>
19 - $ref: audio-graph.yaml#
24 - nvidia,tegra210-audio-graph-card
25 - nvidia,tegra186-audio-graph-card
30 clock-names:
[all …]
H A Dnvidia,tegra210-sfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-sfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 SFC
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Mohan Kumar <mkumard@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: dai-common.yaml#
24 pattern: "^sfc@[0-9a-f]*$"
[all …]
H A Dnvidia,tegra210-mvc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mvc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 MVC
11 signal path. It can be used in input or output signal path for per-stream
14 multi-channel (up to 7.1 channels) stream. An independent mute control is
18 - Jon Hunter <jonathanh@nvidia.com>
19 - Mohan Kumar <mkumard@nvidia.com>
20 - Sameer Pujar <spujar@nvidia.com>
[all …]
H A Dnvidia,tegra210-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 I2S Controller
10 The Inter-IC Sound (I2S) controller implements full-duplex,
11 bi-directional and single direction point-to-point serial
16 - Jon Hunter <jonathanh@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: dai-common.yaml#
[all …]
H A Dnvidia,tegra210-mbdrc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mbdrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 MBDRC
11 Processing Engine (OPE) which interfaces with Audio Hub (AHUB) via
16 - Jon Hunter <jonathanh@nvidia.com>
17 - Mohan Kumar <mkumard@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
23 - const: nvidia,tegra210-mbdrc
[all …]
H A Dnvidia,tegra210-peq.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-peq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 PEQ
14 with Audio Hub (AHUB) via Audio Client Interface (ACIF).
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Mohan Kumar <mkumard@nvidia.com>
19 - Sameer Pujar <spujar@nvidia.com>
24 - const: nvidia,tegra210-peq
[all …]
H A Dnvidia,tegra210-mixer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mixer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 Mixer
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Mohan Kumar <mkumard@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: dai-common.yaml#
24 pattern: "^amixer@[0-9a-f]*$"
[all …]
H A Dnvidia,tegra210-dmic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-dmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 DMIC Controller
16 - Jon Hunter <jonathanh@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: dai-common.yaml#
24 pattern: "^dmic@[0-9a-f]*$"
28 - const: nvidia,tegra210-dmic
[all …]
H A Dnvidia,tegra210-amx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-amx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 AMX
16 - Jon Hunter <jonathanh@nvidia.com>
17 - Mohan Kumar <mkumard@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
21 - $ref: dai-common.yaml#
25 pattern: "^amx@[0-9a-f]*$"
[all …]
H A Dnvidia,tegra210-adx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-adx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 ADX
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Mohan Kumar <mkumard@nvidia.com>
19 - Sameer Pujar <spujar@nvidia.com>
22 - $ref: dai-common.yaml#
26 pattern: "^adx@[0-9a-f]*$"
[all …]
/linux/sound/soc/tegra/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
46 tristate "Tegra30 AHUB module"
48 Say Y or M if you want to add support for the Tegra30 AHUB module.
61 tristate "Tegra210 AHUB module"
63 Config to enable Audio Hub (AHUB) module, which comprises of a
66 AHUB.
67 Say Y or M if you want to add support for Tegra210 AHUB module.
70 tristate "Tegra210 DMIC module"
77 Say Y or M if you want to add support for Tegra210 DMIC module.
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 snd-soc-tegra-pcm-y := tegra_pcm.o
4 snd-soc-tegra-utils-y += tegra_asoc_utils.o
5 snd-soc-tegra20-ac97-y := tegra20_ac97.o
6 snd-soc-tegra20-das-y := tegra20_das.o
7 snd-soc-tegra20-i2s-y := tegra20_i2s.o
8 snd-soc-tegra20-spdif-y := tegra20_spdif.o
9 snd-soc-tegra30-ahub-y := tegra30_ahub.o
10 snd-soc-tegra30-i2s-y := tegra30_i2s.o
11 snd-soc-tegra210-ahub-y := tegra210_ahub.o
[all …]
H A Dtegra210_ahub.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_ahub.c - Tegra210 AHUB driver
5 // Copyright (c) 2020-2024, NVIDIA CORPORATION. All rights reserved.
21 struct tegra_ahub *ahub = snd_soc_component_get_drvdata(cmpnt); in tegra_ahub_get_value_enum() local
22 struct soc_enum *e = (struct soc_enum *)kctl->private_value; in tegra_ahub_get_value_enum()
29 for (i = 0; i < ahub->soc_data->reg_count; i++) { in tegra_ahub_get_value_enum()
32 reg = e->reg + (TEGRA210_XBAR_PART1_RX * i); in tegra_ahub_get_value_enum()
34 reg_val &= ahub->soc_data->mask[i]; in tegra_ahub_get_value_enum()
38 (8 * cmpnt->val_bytes * i); in tegra_ahub_get_value_enum()
44 for (i = 0; i < e->items; i++) { in tegra_ahub_get_value_enum()
[all …]
H A Dtegra210_ahub.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tegra210_ahub.h - TEGRA210 AHUB
5 * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
12 /* Tegra210 specific */
34 (TEGRA210_XBAR_RX_STRIDE * (TEGRA186_XBAR_AUDIO_RX_COUNT - 1)))
37 (TEGRA210_XBAR_RX_STRIDE * (TEGRA210_XBAR_AUDIO_RX_COUNT - 1)))
51 .mask = xmax ? roundup_pow_of_two(xmax) - 1 : 0 \
80 SND_SOC_DAPM_AIF_IN(sname " XBAR-RX", NULL, 0, SND_SOC_NOPM, 0, 0), \
81 SND_SOC_DAPM_AIF_OUT(sname " XBAR-TX", NULL, 0, SND_SOC_NOPM, 0, 0), \
86 SND_SOC_DAPM_AIF_IN(sname " XBAR-RX", NULL, 0, SND_SOC_NOPM, 0, 0), \
[all …]
H A Dtegra210_ope.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tegra210_ope.h - Definitions for Tegra210 OPE driver
69 u32 shift; /* Used as offset for AHUB RAM related programing */
H A Dtegra210_amx.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
5 // tegra210_amx.c - Tegra210 AMX driver
24 * The counter is in terms of AHUB clock cycles. If a frame is not
27 * function of sample rate (8 kHz) and AHUB clock (49.152 MHz).
53 regmap_write(amx->regmap, TEGRA210_AMX_CFG_RAM_CTRL, in tegra210_amx_write_map_ram()
59 regmap_write(amx->regmap, TEGRA210_AMX_CFG_RAM_DATA, in tegra210_amx_write_map_ram()
60 amx->map[i]); in tegra210_amx_write_map_ram()
62 regmap_write(amx->regmap, TEGRA210_AMX_OUT_BYTE_EN0, amx->byte_mask[0]); in tegra210_amx_write_map_ram()
63 regmap_write(amx->regmap, TEGRA210_AMX_OUT_BYTE_EN1, amx->byte_mask[1]); in tegra210_amx_write_map_ram()
[all …]
H A Dtegra210_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
5 // tegra210_i2s.c - Tegra210 I2S driver
32 * On Tegra210, I2S4 has "i2s4a" and "i2s4b" pins and below update
44 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
56 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
62 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
69 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
71 * Other I/O modules in AHUB can use i2s bclk as reference in tegra210_i2s_set_clock_rate()
75 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
[all …]
H A Dtegra210_peq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_peq.c - Tegra210 PEQ driver
31 1495012349, /* Pre-gain */
34 536870912, -1073741824, 536870912, 2143508246, -1069773768, /* Band-0 */
35 134217728, -265414508, 131766272, 2140402222, -1071252997, /* Band-1 */
36 268435456, -233515765, -33935948, 1839817267, -773826124, /* Band-2 */
37 536870912, -672537913, 139851540, 1886437554, -824433167, /* Band-3 */
38 268435456, -114439279, 173723964, 205743566, 278809729, /* Band-4 */
39 1, 0, 0, 0, 0, /* Band-5 */
40 1, 0, 0, 0, 0, /* Band-6 */
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
H A Dtegra210-p2371-2180.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra210-p2180.dtsi"
5 #include "tegra210-p2597.dtsi"
9 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
14 hvddio-pex-supply = <&vdd_1v8>;
15 dvddio-pex-supply = <&vdd_pex_1v05>;
16 vddio-pex-ctl-supply = <&vdd_1v8>;
19 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
20 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
[all …]
H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
[all …]

12