Searched +full:tegra194 +full:- +full:pinmux (Results 1 – 9 of 9) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | nvidia,tegra194-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194 [all...] |
H A D | nvidia,tegra194-pinmux.txt | 1 NVIDIA Tegra194 pinmux controller 4 - compatible: "nvidia,tegra194-pinmux" 5 - reg: Should contain a list of base address and size pairs for: 6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control) 7 - second entry: The PINMUX_AUX_* registers (pinmux) 9 Please refer to pinctrl-bindings.txt in this directory for details of the 17 parameters, such as pull-up, tristate, drive strength, etc. 21 include/dt-binding/pinctrl/pinctrl-tegra.h. 23 Required subnode-properties: 24 - nvidia,pins : An array of strings. Each string contains the name of a pin or [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
H A D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra194-clock.h> 3 #include <dt-bindings/gpio/tegra194-gpio.h> 4 #include <dt-binding 114 pinmux: pinmux@2430000 { global() label [all...] |
H A D | tegra194-p2888.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "tegra194.dtsi" 4 #include <dt-bindings/mfd/max77620.h> 8 compatible = "nvidia,p2888", "nvidia,tegra194"; 27 stdout-path = "serial0:115200n8"; 34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>; 35 phy-handle = <&phy>; 36 phy-mode = "rgmii-id"; 39 #address-cells = <1>; 40 #size-cells = <0>; [all …]
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H A D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/tegra234-clock.h> 4 #include <dt-bindings/gpio/tegra234-gpio.h> 5 #include <dt-bindings/interrupt-controller/arm-gi 115 pinmux: pinmux@2430000 { global() label [all...] |
H A D | tegra194-p3668.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "tegra194.dtsi" 4 #include <dt-bindings/mfd/max77620.h> 24 stdout-path = "serial0:115200n8"; 31 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>; 32 phy-handle = <&phy>; 33 phy-mode = "rgmii-id"; 36 #address-cells = <1>; 37 #size-cells = <0>; 39 phy: ethernet-phy@0 { [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
H A D | nvidia,tegra124-dpaux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 24 pattern: "^dpaux@[0-9a-f]+$" 28 - enum: 29 - nvidia,tegra124-dpaux 30 - nvidia,tegra210-dpaux [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | nvidia,tegra20-sdhci.txt | 7 by mmc.txt and the properties used by the sdhci-tegra driver. 10 - compatible : should be one of: 11 - "nvidia,tegra20-sdhci": for Tegra20 12 - "nvidia,tegra30-sdhci": for Tegra30 13 - "nvidia,tegra114-sdhci": for Tegra114 14 - "nvidia,tegra124-sdhci": for Tegra124 and Tegra132 15 - "nvidia,tegra210-sdhci": for Tegra210 16 - "nvidia,tegra186-sdhci": for Tegra186 17 - "nvidia,tegra194-sdhci": for Tegra194 18 - clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pwm/ |
H A D | nvidia,tegra20-pwm.txt | 4 - compatible: Must be: 5 - "nvidia,tegra20-pwm": for Tegra20 6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30 7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114 8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124 9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 11 - "nvidia,tegra186-pwm": for Tegra186 12 - "nvidia,tegra194-pwm": for Tegra194 13 - reg: physical base address and length of the controller's registers [all …]
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