Searched +full:tegra186 +full:- +full:pmc (Results 1 – 11 of 11) sorted by relevance
/linux/Documentation/devicetree/bindings/arm/tegra/ |
H A D | nvidia,tegra186-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra Power Management Controller (PMC) 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra186-pmc 17 - nvidia,tegra194-pmc 18 - nvidia,tegra234-pmc [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra186.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra186-clock.h> 3 #include <dt-bindings/gpio/tegra186-gpio.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mailbox/tegra186-hsp.h> 6 #include <dt-bindings/memory/tegra186-mc.h> 7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 8 #include <dt-bindings/power/tegra186-powergate.h> 9 #include <dt-bindings/reset/tegra186-reset.h> 10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h> [all …]
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H A D | tegra186-p3310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "tegra186.dtsi" 4 #include <dt-bindings/mfd/max77620.h> 8 compatible = "nvidia,p3310", "nvidia,tegra186"; 27 stdout-path = "serial0:115200n8"; 38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4) 40 phy-handle = <&phy>; 41 phy-mode = "rgmii"; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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H A D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra194-clock.h> 3 #include <dt-bindings/gpio/tegra194-gpio.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mailbox/tegra186-hsp.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 8 #include <dt-bindings/power/tegra194-powergate.h> 9 #include <dt-bindings/reset/tegra194-reset.h> 10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h> [all …]
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H A D | tegra234-p3767.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 28 dma-controller@2930000 { 32 interrupt-controller@2a40000 { 45 vcc-supply = <&vdd_1v8_hs>; 46 address-width = <8>; 49 read-only; 57 compatible = "jedec,spi-nor"; 59 spi-max-frequency = <102000000>; 60 spi-tx-bus-width = <4>; 61 spi-rx-bus-width = <4>; [all …]
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H A D | tegra186-p3509-0000+p3636-0001.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/mfd/max77620.h> 8 #include "tegra186.dtsi" 12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186"; 30 stdout-path = "serial0:115200n8"; 41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>; 42 phy-handle = <&phy>; [all …]
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H A D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/tegra234-clock.h> 4 #include <dt-bindings/gpio/tegra234-gpio.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/mailbox/tegra186-hsp.h> 7 #include <dt-bindings/memory/tegra234-mc.h> 8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 9 #include <dt-bindings/power/tegra234-powergate.h> 10 #include <dt-bindings/reset/tegra234-reset.h> 11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> [all …]
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/linux/drivers/soc/tegra/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y += fuse/ 3 obj-y += cbb/ 5 obj-y += common.o 6 obj-$(CONFIG_SOC_TEGRA_FLOWCTRL) += flowctrl.o 7 obj-$(CONFIG_SOC_TEGRA_PMC) += pmc.o 8 obj-$(CONFIG_SOC_TEGRA20_VOLTAGE_COUPLER) += regulators-tegra20.o 9 obj-$(CONFIG_SOC_TEGRA30_VOLTAGE_COUPLER) += regulators-tegra30.o 10 obj-$(CONFIG_ARCH_TEGRA_186_SOC) += ari-tegra186.o
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H A D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * drivers/soc/tegra/pmc.c 6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 37 #include <linux/pinctrl/pinconf-generic.h> 55 #include <soc/tegra/pmc.h> 57 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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/linux/drivers/gpu/drm/tegra/ |
H A D | vic.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/dma-mapping.h> 17 #include <soc/tegra/pmc.h> 52 writel(value, vic->regs + offset); in vic_writel() 61 if (vic->config->supports_sid && tegra_dev_iommu_get_stream_id(vic->dev, &stream_id)) { in vic_boot() 88 err = falcon_boot(&vic->falcon); in vic_boot() 92 hdr = vic->falcon.firmware.virt; in vic_boot() 97 hdr = vic->falcon.firmware.virt + in vic_boot() 101 falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE, in vic_boot() 104 &vic->falcon, VIC_SET_FCE_UCODE_OFFSET, in vic_boot() [all …]
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/linux/drivers/pci/controller/ |
H A D | pci-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * Copyright (c) 2008-2009, NVIDIA Corporation. 11 * Bits taken from arch/arm/mach-dove/pcie.c 26 #include <linux/irqchip/irq-msi-lib.h> 46 #include <soc/tegra/pmc.h> 258 * Fields in PADS_REFCLK_CFG*. Those registers form an array of 16-bit 380 writel(value, pcie->afi + offset); in afi_writel() 385 return readl(pcie->afi + offset); in afi_readl() 391 writel(value, pcie->pads + offset); in pads_writel() 396 return readl(pcie->pads + offset); in pads_readl() [all …]
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