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/linux/Documentation/admin-guide/hw-vuln/
H A Drsb.rst1 .. SPDX-License-Identifier: GPL-2.0
4 RSB-related mitigations
8 Please keep this document up-to-date, otherwise you will be
17 amongst a myriad of microarchitecture-specific documents.
20 once place and clarify the reasoning behind the current RSB-related
22 the current kernel mitigations: what are the RSB-related attack vectors
39 ----
47 RSB poisoning is a technique used by SpectreRSB [#spectre-rsb]_ where
49 to speculate to an attacker-controlled address. This can happen when
54 [#intel-rsb-filling]_ [#amd-rsb-filling]_ when transitioning between
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/linux/tools/perf/Documentation/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
5 ARTICLES = macro
10 $(filter-out $(addsuffix .txt, $(ARTICLES) $(SP_ARTICLES)), \
11 $(wildcard perf-*.txt)) \
24 _DOC_HTML+=$(patsubst %,%.html,$(ARTICLES) $(SP_ARTICLES))
40 htmldir?=$(prefix)/share/doc/perf-doc
41 pdfdir?=$(prefix)/share/doc/perf-doc
48 ASCIIDOC_EXTRA += --unsafe -f asciidoc.conf
50 MANPAGE_XSL = manpage-normal.xsl
53 RM ?= rm -f
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/linux/Documentation/devicetree/bindings/w1/
H A Dw1-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UART 1-Wire Bus
10 - Christoph Winklhofer <cj.winklhofer@gmail.com>
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
16 The UART peripheral must support full-duplex and operate in open-drain
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
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/linux/Documentation/w1/masters/
H A Dw1-uart.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 Kernel driver w1-uart
11 -----------
13 UART 1-Wire bus driver. The driver utilizes the UART interface via the
14 Serial Device Bus to create the 1-Wire timing patterns as described in
15 the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
17 …g a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a-u…
19 In short, the UART peripheral must support full-duplex and operate in
20 open-drain mode. The timing patterns are generated by a specific
21 combination of baud-rate and transmitted byte, which corresponds to a
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/linux/Documentation/virt/coco/
H A Dtdx-guest.rst1 .. SPDX-License-Identifier: GPL-2.0
10 The TDX guest driver exposes IOCTL interfaces via the /dev/tdx-guest misc
11 device to allow userspace to get certain TDX guest-specific details.
24 -----------------------
28 tdx_report_req.tdreport and return 0. Return -EINVAL for invalid
29 operands, -EIO on TDCALL failure or standard error number on other
37 subtype-specific TDREPORT request. Although the subtype option is mentioned in
46 ---------
50 https://www.intel.com/content/www/us/en/developer/articles/technical/intel-trust-domain-extensions.…
/linux/Documentation/process/
H A Dcontribution-maturity-model.rst1 .. SPDX-License-Identifier: GPL-2.0
12 `discussion <https://lwn.net/Articles/870581/>`_ about the challenges in
22 To that end, the Linux Foundation Technical Advisory Board (TAB)
56 * Software Engineers will be supported to attend Linux-related
67 * Contributing presentations or papers to Linux-related or academic
86 * The number of out-of-tree commits present in internal kernels.
96 * Software Engineers are supported in helping to organize Linux-related
H A Dhowto.rst6 This is the be-all, end-all document on this topic. It contains
9 contain anything related to the technical aspects of kernel programming,
18 ------------
27 The kernel is written mostly in C, with some architecture-dependent
30 you plan to do low-level development for that architecture. Though they
34 - "The C Programming Language" by Kernighan and Ritchie [Prentice Hall]
35 - "Practical C Programming" by Steve Oualline [O'Reilly]
36 - "C: A Reference Manual" by Harbison and Steele [Prentice Hall]
60 ------------
65 described in :ref:`Documentation/process/license-rules.rst <kernel_licensing>`.
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H A D2.Process.rst14 ---------------
16 The kernel developers use a loosely time-based release process, with a new
53 be called 5.6-rc1. The -rc1 release is the signal that the time to
63 exception is made for drivers for previously-unsupported hardware; if they
64 touch no in-tree code, they cannot cause regressions and should be safe to
68 time. Linus releases new -rc kernels about once a week; a normal series
69 will get up to somewhere between -rc6 and -rc9 before the kernel is
78 September 30 5.4-rc1, merge window closes
79 October 6 5.4-rc2
80 October 13 5.4-rc3
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/linux/Documentation/translations/sp_SP/process/
H A Dcontribution-maturity-model.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-sp.rst
4 :Original: Documentation/process/contribution-maturity-model.rst
16 una `discusión <https://lwn.net/Articles/870581/>`_ sobre los desafíos
27 Con ese fin, Technical Advisory Board (TAB) de la Fundación Linux propone
/linux/Documentation/scsi/
H A Daic7xxx.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0
36 aic7892 20 PCI/64-66 80MHz 16Bit 16 3 4 5 6 7 8
41 aic7899 20 PCI/64-66 80MHz 16Bit 16 2 3 4 5 6 7 8
44 1. Multiplexed Twin Channel Device - One controller servicing two
46 2. Multi-function Twin Channel Device - Two controllers on one chip.
47 3. Command Channel Secondary DMA Engine - Allows scatter gather list
49 4. 64 Byte SCB Support - Allows disconnected, untagged request table
51 5. Block Move Instruction Support - Doubles the speed of certain
53 6. 'Bayonet' style Scatter Gather Engine - Improves S/G prefetch
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H A Daic79xx.rst1 .. SPDX-License-Identifier: GPL-2.0
28 AIC-7901A Single Channel 64-bit PCI-X 133MHz to
30 AIC-7901B Single Channel 64-bit PCI-X 133MHz to
32 AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to
34 AIC-7902B Dual Channel 64-bit PCI-X 133MHz to
41 Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B
43 68-pin, two internal 68-pin)
44 Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B
46 68-pin, two internal 68-pin)
47 Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4
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/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
10 ------------------------
19 `Vivado integration <https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top>`_
20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board
21 `QSys integration <https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd>`_
23 `PCIe integration <https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd>`_ of the core.
33 version of emulation support can be cloned from ctu-canfd branch of QEMU local
34 development `repository <https://gitlab.fel.cvut.cz/canbus/qemu-canbus>`_.
38 ---------------
59 it allows for device hot-plug.
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/linux/tools/power/pm-graph/
H A DREADME8 pm-graph: suspend/resume/boot timing analysis tools
11 …Home Page: https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/overvi…
13 Report bugs/issues at bugzilla.kernel.org Tools/pm-graph
14 - https://bugzilla.kernel.org/buglist.cgi?component=pm-graph&product=Tools
17 - Getting Started:
18 https://www.intel.com/content/www/us/en/developer/articles/technical/usage.html
20 - Feature Summary:
21 https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/features.html
23 - upstream version in git:
24 git clone https://github.com/intel/pm-graph/
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/linux/Documentation/admin-guide/pm/
H A Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
38 put into different P-states.
41 capacity, so as to decide which P-states to put the CPUs into. Of course, since
64 information on the available P-states (or P-state ranges in some cases) and
65 access platform-specific hardware interfaces to change CPU P-states as requested
70 performance scaling algorithms for P-state selection can be represented in a
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