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/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,q6dsp-lpass-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 - qcom,q6afe-dais
20 '#sound-dai-cells':
23 '#address-cells':
26 '#size-cells':
31 '^dai@[0-9]+$':
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H A Dfsl,sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 serial interfaces with frame synchronization such as I2S, AC97, TDM, and
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
[all …]
/linux/drivers/soc/fsl/qe/
H A Dtsa.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
12 #include <dt-bindings/soc/qe-fsl,tsa.h>
50 * SI mode register :
51 * - CPM1: 32bit register split in 2*16bit (16bit TDM)
52 * - QE: 4x16bit registers, one per TDM
85 /* CPM SI global mode register (8 bits) */
95 /* QE SI global mode register high (8 bits) */
166 struct tsa_tdm tdm[4]; /* TDMa, TDMb, TDMc and TDMd */ member
168 struct tsa_tdm tdm[2]; /* TDMa and TDMb */ member
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H A Ducc_fast.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * QE UCC Fast API Set - UCC Fast specific routines implementations.
28 printk(KERN_INFO "UCC%u Fast registers:\n", uccf->uf_info->ucc_num); in ucc_fast_dump_regs()
29 printk(KERN_INFO "Base address: 0x%p\n", uccf->uf_regs); in ucc_fast_dump_regs()
32 &uccf->uf_regs->gumr, ioread32be(&uccf->uf_regs->gumr)); in ucc_fast_dump_regs()
34 &uccf->uf_regs->upsmr, ioread32be(&uccf->uf_regs->upsmr)); in ucc_fast_dump_regs()
36 &uccf->uf_regs->utodr, ioread16be(&uccf->uf_regs->utodr)); in ucc_fast_dump_regs()
38 &uccf->uf_regs->udsr, ioread16be(&uccf->uf_regs->udsr)); in ucc_fast_dump_regs()
40 &uccf->uf_regs->ucce, ioread32be(&uccf->uf_regs->ucce)); in ucc_fast_dump_regs()
42 &uccf->uf_regs->uccm, ioread32be(&uccf->uf_regs->uccm)); in ucc_fast_dump_regs()
[all …]
/linux/sound/soc/ti/
H A Ddavinci-mcasp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Author: Nirmal Pandey <n-pandey@ti.com>,
70 /* Left(even TDM Slot) Channel Status Register File */
72 /* Right(odd TDM slot) Channel Status Register File */
74 /* Left(even TDM slot) User Data Register File */
76 /* Right(odd TDM Slot) User Data Register File */
100 * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management
107 * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits
108 * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits
109 * DAVINCI_MCASP_PDOUT_REG - Pin output in GPIO mode
[all …]
H A Ddavinci-mcasp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Multi-channel Audio Serial Port Driver
7 * Author: Nirmal Pandey <n-pandey@ti.com>,
37 #include "edma-pcm.h"
38 #include "sdma-pcm.h"
39 #include "udma-pcm.h"
40 #include "davinci-mcasp.h"
134 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits()
141 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits()
148 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits()
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H A Ddavinci-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * based on davinci-mcasp.c DT support
30 #include "edma-pcm.h"
31 #include "davinci-i2s.h"
33 #define DRV_NAME "davinci-i2s"
38 * - This driver supports the "Audio Serial Port" (ASP),
41 * - But it labels it a "Multi-channel Buffered Serial Port"
43 * backward-compatible, possibly explaining that confusion.
45 * - OMAP chips have a controller called McBSP, which is
48 * - Newer DaVinci chips have a controller called McASP,
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/linux/sound/soc/qcom/qdsp6/
H A Dq6afe-dai.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include "q6dsp-lpass-ports.h"
16 #include "q6dsp-common.h"
42 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); in q6slim_hw_params()
43 struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim; in q6slim_hw_params()
45 slim->sample_rate = params_rate(params); in q6slim_hw_params()
50 slim->bit_width = 16; in q6slim_hw_params()
53 slim->bit_width = 24; in q6slim_hw_params()
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/linux/Documentation/sound/soc/
H A Ddai.rst35 I2S has several different operating modes:-
51 flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
54 while sync runs at the sample rate. PCM also supports Time Division
55 Multiplexing (TDM) in that several devices can use the bus simultaneously (this
56 is sometimes referred to as network mode).
58 Common PCM operating modes:-
60 Mode A
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
63 Mode B
64 MSB is transmitted on rising edge of FRAME/SYNC.
/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
3 // MediaTek ALSA SoC Audio DAI TDM Control
11 #include "mt8186-afe-clk.h"
12 #include "mt8186-afe-common.h"
13 #include "mt8186-afe-gpio.h"
14 #include "mt8186-interconnection.h"
60 unsigned int mode) in get_tdm_lrck_width() argument
62 if (mode == TDM_IN_DSP_A || mode == TDM_IN_DSP_B) in get_tdm_lrck_width()
65 return snd_pcm_format_physical_width(format) - 1; in get_tdm_lrck_width()
78 static unsigned int get_tdm_ch_per_sdata(unsigned int mode, in get_tdm_ch_per_sdata() argument
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/linux/sound/soc/codecs/
H A Dtas5720.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tas5720.c - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier
5 * Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com
22 #include <sound/soc-dapm.h>
37 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */
38 "pvdd", /* Class-D amp and analog power supply (connected). */
57 struct snd_soc_component *component = dai->component; in tas5720_hw_params()
72 dev_err(component->dev, "unsupported sample rate: %u\n", rate); in tas5720_hw_params()
73 return -EINVAL; in tas5720_hw_params()
79 dev_err(component->dev, "error setting sample rate: %d\n", ret); in tas5720_hw_params()
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H A Dpcm3168a.c1 // SPDX-License-Identifier: GPL-2.0-only
108 static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" };
126 /* -100db to 0db, register values 0-54 cause mute */
127 static const DECLARE_TLV_DB_SCALE(pcm3168a_dac_tlv, -10050, 50, 1);
129 /* -100db to 20db, register values 0-14 cause mute */
130 static const DECLARE_TLV_DB_SCALE(pcm3168a_adc_tlv, -10050, 50, 1);
133 SOC_SINGLE("DAC Power-Save Switch", PCM3168A_DAC_PWR_MST_FMT,
135 SOC_ENUM("DAC1 Digital Filter roll-off", pcm3168a_d1_roll_off),
136 SOC_ENUM("DAC2 Digital Filter roll-off", pcm3168a_d2_roll_off),
137 SOC_ENUM("DAC3 Digital Filter roll-off", pcm3168a_d3_roll_off),
[all …]
H A Dadau7118.c1 // SPDX-License-Identifier: GPL-2.0
3 // Analog Devices ADAU7118 8 channel PDM-to-I2S/TDM Converter driver
130 snd_soc_component_get_drvdata(dai->component); in adau7118_set_channel_map()
133 dev_dbg(st->dev, "Set channel map, %d", tx_num); in adau7118_set_channel_map()
136 ret = snd_soc_component_update_bits(dai->component, in adau7118_set_channel_map()
150 snd_soc_component_get_drvdata(dai->component); in adau7118_set_fmt()
154 dev_dbg(st->dev, "Set format, fmt:%d\n", fmt); in adau7118_set_fmt()
158 ret = snd_soc_component_update_bits(dai->component, in adau7118_set_fmt()
164 ret = snd_soc_component_update_bits(dai->component, in adau7118_set_fmt()
170 st->right_j = true; in adau7118_set_fmt()
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H A Darizona.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arizona.c - Wolfson Arizona class device shared support
67 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
69 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
71 dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
74 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
76 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
78 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
84 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in arizona_spk_ev()
85 struct arizona *arizona = dev_get_drvdata(component->dev->parent); in arizona_spk_ev()
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H A Dmadera.c1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and
18 #include <linux/irqchip/irq-madera.h>
22 #include <sound/madera-pdata.h>
24 #include <dt-bindings/sound/madera.h>
143 dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
145 dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
147 dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
150 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
152 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
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H A Drt5677.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5677.c -- RT5677 ALSA SoC audio codec driver
29 #include <sound/soc-dapm.h>
35 #include "rt5677-spi.h"
552 * rt5677_dsp_mode_i2c_write_addr - Write value to address on DSP mode.
563 struct snd_soc_component *component = rt5677->component; in rt5677_dsp_mode_i2c_write_addr()
566 mutex_lock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_write_addr()
568 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, in rt5677_dsp_mode_i2c_write_addr()
571 dev_err(component->dev, "Failed to set addr msb value: %d\n", ret); in rt5677_dsp_mode_i2c_write_addr()
575 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, in rt5677_dsp_mode_i2c_write_addr()
[all …]
/linux/sound/soc/rockchip/
H A Drockchip_i2s_tdm.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // ALSA SoC Audio Layer - Rockchip I2S/TDM Controller driver
5 // Author: Sugar Zhang <sugar.zhang@rock-chips.com>
9 #include <linux/clk-provider.h>
23 #define DRV_NAME "rockchip-i2s-tdm"
91 clk_disable_unprepare(i2s_tdm->mclk_tx); in i2s_tdm_disable_unprepare_mclk()
92 clk_disable_unprepare(i2s_tdm->mclk_rx); in i2s_tdm_disable_unprepare_mclk()
96 * i2s_tdm_prepare_enable_mclk - prepare to enable all mclks, disable them on
109 ret = clk_prepare_enable(i2s_tdm->mclk_tx); in i2s_tdm_prepare_enable_mclk()
112 ret = clk_prepare_enable(i2s_tdm->mclk_rx); in i2s_tdm_prepare_enable_mclk()
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/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
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H A Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "shared-dma-pool";
30 no-map;
34 compatible = "shared-dma-pool";
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/linux/sound/soc/fsl/
H A Dfsl_audmix.c1 // SPDX-License-Identifier: GPL-2.0
52 /* DIS->DIS, do nothing */
54 /* DIS->TDM1*/
55 { .tdms = 1, .clk = 1, .msg = "DIS->TDM1: TDM1 not started!\n" },
56 /* DIS->TDM2*/
57 { .tdms = 2, .clk = 2, .msg = "DIS->TDM2: TDM2 not started!\n" },
58 /* DIS->MIX */
59 { .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" }
60 }, { /* TDM1->DIS */
61 { .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" },
[all …]
/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "ti,da850-evm", "ti,da850";
13 model = "DA850/AM1808/OMAP-L138 EVM";
16 stdout-path = &serial2;
27 backlight: backlight-pwm {
28 pinctrl-names = "default";
29 pinctrl-0 = <&ecap2_pins>;
[all …]
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_sf.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
47 * - --- ---- ---- ---- ---- ---- ---- ----
48 * 0-11: id number
49 * 12-15: group id number
50 * 16-19: number of parameters
51 * 20-27: unused
52 * 28-30: active: identify SF packet, otherwise regular int32
114 "UFO PR-Check: [0x%08.8x] is 0x%08.8x requires >= 0x%08.8x" },
116 "UFO SPM PR-Checks for FWCtx 0x%08.8x" },
118 …"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= ????????, [0x%08.8x] is ???????? req…
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/linux/sound/soc/stm/
H A Dstm32_sai_sub.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
10 #include <linux/clk-provider.h>
41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK)
42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE)
47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID)
53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif)
54 #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm)
55 #define STM_SAI_HAS_PDM(x) ((x)->pdata->conf.has_spdif_pdm)
56 #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4((x)->pdata))
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-pepper.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/
5 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "gumstix,am335x-pepper", "ti,am33xx";
16 cpu0-supply = <&dcdc3_reg>;
26 compatible = "gpio-keys";
29 leds: user-leds-pins {
30 compatible = "gpio-leds";
38 compatible = "ti,da830-evm-audio";
[all …]
/linux/sound/soc/tegra/
H A Dtegra210_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
5 // tegra210_i2s.c - Tegra210 I2S driver
44 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
56 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
62 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
69 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
72 * clock. Below sets sync input clock rate as per bclk, in tegra210_i2s_set_clock_rate()
75 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
78 "can't set I2S sync input rate %u, err = %d\n", in tegra210_i2s_set_clock_rate()
[all …]

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